forked from luck/tmp_suning_uos_patched
docs: mm: numaperf.rst Add brief description for access class 1.
Try to make minimal changes to the document which already describes access class 0 in a generic fashion (including IO initiatiors that are not CPUs). Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
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@ -56,6 +56,11 @@ nodes' access characteristics share the same performance relative to other
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linked initiator nodes. Each target within an initiator's access class,
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though, do not necessarily perform the same as each other.
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The access class "1" is used to allow differentiation between initiators
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that are CPUs and hence suitable for generic task scheduling, and
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IO initiators such as GPUs and NICs. Unlike access class 0, only
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nodes containing CPUs are considered.
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================
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NUMA Performance
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================
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@ -88,6 +93,9 @@ The latency attributes are provided in nanoseconds.
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The values reported here correspond to the rated latency and bandwidth
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for the platform.
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Access class 1 takes the same form but only includes values for CPU to
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memory activity.
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==========
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NUMA Cache
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==========
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