forked from luck/tmp_suning_uos_patched
NTB: Check the device ID to set errata flags
Set errata flags for the specific device IDs to which they apply, instead of the whole Xeon hardware class. Signed-off-by: Dave Jiang <dave.jiang@intel.com> Signed-off-by: Jon Mason <jdmason@kudzu.us>
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@ -1718,29 +1718,68 @@ static int snb_init_dev(struct intel_ntb_dev *ndev)
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u8 ppd;
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int rc, mem;
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pdev = ndev_pdev(ndev);
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switch (pdev->device) {
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/* There is a Xeon hardware errata related to writes to SDOORBELL or
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* B2BDOORBELL in conjunction with inbound access to NTB MMIO Space,
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* which may hang the system. To workaround this use the second memory
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* window to access the interrupt and scratch pad registers on the
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* remote system.
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*/
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ndev->hwerr_flags |= NTB_HWERR_SDOORBELL_LOCKUP;
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case PCI_DEVICE_ID_INTEL_NTB_SS_JSF:
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case PCI_DEVICE_ID_INTEL_NTB_PS_JSF:
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case PCI_DEVICE_ID_INTEL_NTB_B2B_JSF:
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case PCI_DEVICE_ID_INTEL_NTB_SS_SNB:
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case PCI_DEVICE_ID_INTEL_NTB_PS_SNB:
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case PCI_DEVICE_ID_INTEL_NTB_B2B_SNB:
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case PCI_DEVICE_ID_INTEL_NTB_SS_IVT:
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case PCI_DEVICE_ID_INTEL_NTB_PS_IVT:
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case PCI_DEVICE_ID_INTEL_NTB_B2B_IVT:
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case PCI_DEVICE_ID_INTEL_NTB_SS_HSX:
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case PCI_DEVICE_ID_INTEL_NTB_PS_HSX:
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case PCI_DEVICE_ID_INTEL_NTB_B2B_HSX:
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ndev->hwerr_flags |= NTB_HWERR_SDOORBELL_LOCKUP;
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break;
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}
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switch (pdev->device) {
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/* There is a hardware errata related to accessing any register in
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* SB01BASE in the presence of bidirectional traffic crossing the NTB.
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*/
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ndev->hwerr_flags |= NTB_HWERR_SB01BASE_LOCKUP;
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case PCI_DEVICE_ID_INTEL_NTB_SS_IVT:
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case PCI_DEVICE_ID_INTEL_NTB_PS_IVT:
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case PCI_DEVICE_ID_INTEL_NTB_B2B_IVT:
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case PCI_DEVICE_ID_INTEL_NTB_SS_HSX:
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case PCI_DEVICE_ID_INTEL_NTB_PS_HSX:
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case PCI_DEVICE_ID_INTEL_NTB_B2B_HSX:
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ndev->hwerr_flags |= NTB_HWERR_SB01BASE_LOCKUP;
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break;
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}
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switch (pdev->device) {
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/* HW Errata on bit 14 of b2bdoorbell register. Writes will not be
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* mirrored to the remote system. Shrink the number of bits by one,
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* since bit 14 is the last bit.
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*/
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ndev->hwerr_flags |= NTB_HWERR_B2BDOORBELL_BIT14;
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case PCI_DEVICE_ID_INTEL_NTB_SS_JSF:
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case PCI_DEVICE_ID_INTEL_NTB_PS_JSF:
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case PCI_DEVICE_ID_INTEL_NTB_B2B_JSF:
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case PCI_DEVICE_ID_INTEL_NTB_SS_SNB:
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case PCI_DEVICE_ID_INTEL_NTB_PS_SNB:
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case PCI_DEVICE_ID_INTEL_NTB_B2B_SNB:
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case PCI_DEVICE_ID_INTEL_NTB_SS_IVT:
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case PCI_DEVICE_ID_INTEL_NTB_PS_IVT:
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case PCI_DEVICE_ID_INTEL_NTB_B2B_IVT:
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case PCI_DEVICE_ID_INTEL_NTB_SS_HSX:
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case PCI_DEVICE_ID_INTEL_NTB_PS_HSX:
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case PCI_DEVICE_ID_INTEL_NTB_B2B_HSX:
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ndev->hwerr_flags |= NTB_HWERR_B2BDOORBELL_BIT14;
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break;
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}
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ndev->reg = &snb_reg;
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pdev = ndev_pdev(ndev);
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rc = pci_read_config_byte(pdev, SNB_PPD_OFFSET, &ppd);
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if (rc)
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return -EIO;
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