forked from luck/tmp_suning_uos_patched
counter: 104-quad-8: Support Filter Clock Prescaler
The ACCES 104-QUAD-8 series does active filtering on the quadrature input signals via the PC/104 bus clock (OSC 14.318 MHz). This patch exposes the filter clock prescaler available on each channel. Signed-off-by: William Breathitt Gray <vilhelm.gray@gmail.com> Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
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@ -1,3 +1,10 @@
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What: /sys/bus/counter/devices/counterX/signalY/filter_clock_prescaler
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KernelVersion: 5.7
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Contact: linux-iio@vger.kernel.org
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Description:
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Filter clock factor for input Signal Y. This prescaler value
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affects the inputs of both quadrature pair signals.
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What: /sys/bus/counter/devices/counterX/signalY/index_polarity
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KernelVersion: 5.2
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Contact: linux-iio@vger.kernel.org
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@ -43,6 +43,7 @@ MODULE_PARM_DESC(base, "ACCES 104-QUAD-8 base addresses");
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*/
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struct quad8_iio {
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struct counter_device counter;
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unsigned int fck_prescaler[QUAD8_NUM_COUNTERS];
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unsigned int preset[QUAD8_NUM_COUNTERS];
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unsigned int count_mode[QUAD8_NUM_COUNTERS];
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unsigned int quadrature_mode[QUAD8_NUM_COUNTERS];
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@ -84,6 +85,8 @@ struct quad8_iio {
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#define QUAD8_RLD_PRESET_CNTR 0x08
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/* Transfer Counter to Output Latch */
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#define QUAD8_RLD_CNTR_OUT 0x10
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/* Transfer Preset Register LSB to FCK Prescaler */
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#define QUAD8_RLD_PRESET_PSC 0x18
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#define QUAD8_CHAN_OP_ENABLE_COUNTERS 0x00
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#define QUAD8_CHAN_OP_RESET_COUNTERS 0x01
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#define QUAD8_CMR_QUADRATURE_X1 0x08
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@ -1140,6 +1143,50 @@ static ssize_t quad8_count_preset_enable_write(struct counter_device *counter,
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return len;
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}
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static ssize_t quad8_signal_fck_prescaler_read(struct counter_device *counter,
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struct counter_signal *signal, void *private, char *buf)
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{
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const struct quad8_iio *const priv = counter->priv;
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const size_t channel_id = signal->id / 2;
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return sprintf(buf, "%u\n", priv->fck_prescaler[channel_id]);
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}
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static ssize_t quad8_signal_fck_prescaler_write(struct counter_device *counter,
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struct counter_signal *signal, void *private, const char *buf,
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size_t len)
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{
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struct quad8_iio *const priv = counter->priv;
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const size_t channel_id = signal->id / 2;
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const int base_offset = priv->base + 2 * channel_id;
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u8 prescaler;
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int ret;
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ret = kstrtou8(buf, 0, &prescaler);
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if (ret)
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return ret;
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priv->fck_prescaler[channel_id] = prescaler;
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/* Reset Byte Pointer */
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outb(QUAD8_CTR_RLD | QUAD8_RLD_RESET_BP, base_offset + 1);
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/* Set filter clock factor */
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outb(prescaler, base_offset);
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outb(QUAD8_CTR_RLD | QUAD8_RLD_RESET_BP | QUAD8_RLD_PRESET_PSC,
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base_offset + 1);
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return len;
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}
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static const struct counter_signal_ext quad8_signal_ext[] = {
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{
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.name = "filter_clock_prescaler",
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.read = quad8_signal_fck_prescaler_read,
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.write = quad8_signal_fck_prescaler_write
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}
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};
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static const struct counter_signal_ext quad8_index_ext[] = {
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COUNTER_SIGNAL_ENUM("index_polarity", &quad8_index_pol_enum),
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COUNTER_SIGNAL_ENUM_AVAILABLE("index_polarity", &quad8_index_pol_enum),
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@ -1147,9 +1194,11 @@ static const struct counter_signal_ext quad8_index_ext[] = {
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COUNTER_SIGNAL_ENUM_AVAILABLE("synchronous_mode", &quad8_syn_mode_enum)
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};
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#define QUAD8_QUAD_SIGNAL(_id, _name) { \
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.id = (_id), \
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.name = (_name) \
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#define QUAD8_QUAD_SIGNAL(_id, _name) { \
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.id = (_id), \
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.name = (_name), \
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.ext = quad8_signal_ext, \
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.num_ext = ARRAY_SIZE(quad8_signal_ext) \
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}
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#define QUAD8_INDEX_SIGNAL(_id, _name) { \
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@ -1314,6 +1363,12 @@ static int quad8_probe(struct device *dev, unsigned int id)
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base_offset = base[id] + 2 * i;
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/* Reset Byte Pointer */
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outb(QUAD8_CTR_RLD | QUAD8_RLD_RESET_BP, base_offset + 1);
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/* Reset filter clock factor */
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outb(0, base_offset);
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outb(QUAD8_CTR_RLD | QUAD8_RLD_RESET_BP | QUAD8_RLD_PRESET_PSC,
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base_offset + 1);
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/* Reset Byte Pointer */
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outb(QUAD8_CTR_RLD | QUAD8_RLD_RESET_BP, base_offset + 1);
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/* Reset Preset Register */
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for (j = 0; j < 3; j++)
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outb(0x00, base_offset);
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@ -364,7 +364,7 @@ static int icp10100_read_raw_measures(struct iio_dev *indio_dev,
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default:
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ret = -EINVAL;
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break;
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};
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}
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error_release:
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iio_device_release_direct_mode(indio_dev);
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