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[media] nuvoton-cir: Don't touch PS/2 interrupts while initializing

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There are reports[1] that on some motherboards loading the nuvoton-cir
disables PS/2 keyboard input. This is caused by an erroneous write of
CIR_INTR_MOUSE_IRQ_BIT to ACPI control register.

According to datasheet the write enables mouse power management event
interrupts which will probably have ill effects if the motherboard has
only one PS/2 port with keyboard in it.

The cir hardware does not need mouse interrupts to function and should
not touch them. This patch removes the illegal writes and registry
definitions.

[1] http://ubuntuforums.org/showthread.php?t=2106277&p=12461912&mode=threaded#post12461912

Reported-by: Bruno Maire <bruno.maire@besonet.ch>
Tested-by: Bruno Maire <bruno.maire@besonet.ch>
Signed-off-by: Antti Seppälä <a.seppala@gmail.com>
Acked-by: Jarod Wilson <jarod@redhat.com>
Signed-off-by: Mauro Carvalho Chehab <m.chehab@samsung.com>
This commit is contained in:
Antti Seppälä 2014-01-25 06:57:46 -03:00 committed by Mauro Carvalho Chehab
parent 8d2b022911
commit dee88f4378
2 changed files with 0 additions and 5 deletions
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4
drivers/media/rc/nuvoton-cir.c
View File

@ -330,9 +330,6 @@ static void nvt_cir_wake_ldev_init(struct nvt_dev *nvt)
/* Enable CIR Wake via PSOUT# (Pin60) */
nvt_set_reg_bit(nvt, CIR_WAKE_ENABLE_BIT, CR_ACPI_CIR_WAKE);
/* enable cir interrupt of mouse/keyboard IRQ event */
nvt_set_reg_bit(nvt, CIR_INTR_MOUSE_IRQ_BIT, CR_ACPI_IRQ_EVENTS);
/* enable pme interrupt of cir wakeup event */
nvt_set_reg_bit(nvt, PME_INTR_CIR_PASS_BIT, CR_ACPI_IRQ_EVENTS2);
@ -456,7 +453,6 @@ static void nvt_enable_wake(struct nvt_dev *nvt)
nvt_select_logical_dev(nvt, LOGICAL_DEV_ACPI);
nvt_set_reg_bit(nvt, CIR_WAKE_ENABLE_BIT, CR_ACPI_CIR_WAKE);
nvt_set_reg_bit(nvt, CIR_INTR_MOUSE_IRQ_BIT, CR_ACPI_IRQ_EVENTS);
nvt_set_reg_bit(nvt, PME_INTR_CIR_PASS_BIT, CR_ACPI_IRQ_EVENTS2);
nvt_select_logical_dev(nvt, LOGICAL_DEV_CIR_WAKE);

1
drivers/media/rc/nuvoton-cir.h
View File

@ -363,7 +363,6 @@ struct nvt_dev {
#define LOGICAL_DEV_ENABLE 0x01
#define CIR_WAKE_ENABLE_BIT 0x08
#define CIR_INTR_MOUSE_IRQ_BIT 0x80
#define PME_INTR_CIR_PASS_BIT 0x08
/* w83677hg CIR pin config */