forked from luck/tmp_suning_uos_patched
ahci: qoriq: Update the default Rx watermark value
The PTC[RXWM] sets the watermark value for Rx FIFO. The default value 0x20 might be insufficient for some hard drives. If the watermark value is too small, a single-cycle overflow may occur and is reported as a CRC or internal error in the PxSERR register. Updated the value to 0x29 according to the validation test. All LS platforms are affected. Signed-off-by: Tang Yuantian <Yuantian.Tang@freescale.com> Signed-off-by: Tejun Heo <tj@kernel.org>
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@ -38,7 +38,7 @@
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#define AHCI_PORT_PHY_3_CFG 0x0e081004
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#define AHCI_PORT_PHY_4_CFG 0x00480811
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#define AHCI_PORT_PHY_5_CFG 0x192c96a4
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#define AHCI_PORT_TRANS_CFG 0x08000025
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#define AHCI_PORT_TRANS_CFG 0x08000029
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#define LS1043A_PORT_PHY2 0x28184d1f
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#define LS1043A_PORT_PHY3 0x0e081509
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@ -169,6 +169,7 @@ static int ahci_qoriq_phy_init(struct ahci_host_priv *hpriv)
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case AHCI_LS2080A:
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writel(AHCI_PORT_PHY_1_CFG, reg_base + PORT_PHY1);
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writel(AHCI_PORT_TRANS_CFG, reg_base + PORT_TRANS);
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break;
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}
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