forked from luck/tmp_suning_uos_patched
Merge branch 'spi/next' (early part) into spi/merge
This commit is contained in:
Grant Likely
commit
e583685e99
@ -346,14 +346,14 @@ config SPI_TI_SSP
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serial port.
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config SPI_TOPCLIFF_PCH
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tristate "Intel EG20T PCH/OKI SEMICONDUCTOR ML7213 IOH SPI controller"
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tristate "Intel EG20T PCH/LAPIS Semicon IOH(ML7213/ML7223/ML7831) SPI"
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depends on PCI
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help
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SPI driver for the Topcliff PCH (Platform Controller Hub) SPI bus
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used in some x86 embedded processors.
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This driver also supports the ML7213, a companion chip for the
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Atom E6xx series and compatible with the Intel EG20T PCH.
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This driver also supports the ML7213/ML7223/ML7831, a companion chip
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for the Atom E6xx series and compatible with the Intel EG20T PCH.
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config SPI_TXX9
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tristate "Toshiba TXx9 SPI controller"
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@ -121,6 +121,7 @@ struct omap2_mcspi {
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/* SPI1 has 4 channels, while SPI2 has 2 */
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struct omap2_mcspi_dma *dma_channels;
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struct device *dev;
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struct workqueue_struct *wq;
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};
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struct omap2_mcspi_cs {
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@ -143,8 +144,6 @@ struct omap2_mcspi_regs {
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static struct omap2_mcspi_regs omap2_mcspi_ctx[OMAP2_MCSPI_MAX_CTRL];
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static struct workqueue_struct *omap2_mcspi_wq;
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#define MOD_REG_BIT(val, mask, set) do { \
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if (set) \
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val |= mask; \
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@ -1043,7 +1042,7 @@ static int omap2_mcspi_transfer(struct spi_device *spi, struct spi_message *m)
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spin_lock_irqsave(&mcspi->lock, flags);
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list_add_tail(&m->queue, &mcspi->msg_queue);
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queue_work(omap2_mcspi_wq, &mcspi->work);
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queue_work(mcspi->wq, &mcspi->work);
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spin_unlock_irqrestore(&mcspi->lock, flags);
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return 0;
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@ -1088,6 +1087,7 @@ static int __init omap2_mcspi_probe(struct platform_device *pdev)
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struct omap2_mcspi *mcspi;
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struct resource *r;
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int status = 0, i;
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char wq_name[20];
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master = spi_alloc_master(&pdev->dev, sizeof *mcspi);
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if (master == NULL) {
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@ -1111,10 +1111,17 @@ static int __init omap2_mcspi_probe(struct platform_device *pdev)
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mcspi = spi_master_get_devdata(master);
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mcspi->master = master;
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sprintf(wq_name, "omap2_mcspi/%d", master->bus_num);
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mcspi->wq = alloc_workqueue(wq_name, WQ_MEM_RECLAIM, 1);
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if (mcspi->wq == NULL) {
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status = -ENOMEM;
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goto free_master;
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}
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r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
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if (r == NULL) {
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status = -ENODEV;
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goto err1;
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goto free_master;
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}
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r->start += pdata->regs_offset;
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@ -1123,14 +1130,14 @@ static int __init omap2_mcspi_probe(struct platform_device *pdev)
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if (!request_mem_region(r->start, resource_size(r),
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dev_name(&pdev->dev))) {
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status = -EBUSY;
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goto err1;
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goto free_master;
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}
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mcspi->base = ioremap(r->start, resource_size(r));
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if (!mcspi->base) {
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dev_dbg(&pdev->dev, "can't ioremap MCSPI\n");
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status = -ENOMEM;
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goto err2;
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goto release_region;
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}
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mcspi->dev = &pdev->dev;
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@ -1145,7 +1152,7 @@ static int __init omap2_mcspi_probe(struct platform_device *pdev)
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GFP_KERNEL);
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if (mcspi->dma_channels == NULL)
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goto err2;
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goto unmap_io;
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for (i = 0; i < master->num_chipselect; i++) {
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char dma_ch_name[14];
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@ -1175,25 +1182,33 @@ static int __init omap2_mcspi_probe(struct platform_device *pdev)
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mcspi->dma_channels[i].dma_tx_sync_dev = dma_res->start;
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}
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if (status < 0)
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goto dma_chnl_free;
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pm_runtime_enable(&pdev->dev);
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if (status || omap2_mcspi_master_setup(mcspi) < 0)
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goto err3;
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goto disable_pm;
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status = spi_register_master(master);
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if (status < 0)
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goto err4;
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goto err_spi_register;
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return status;
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err4:
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err_spi_register:
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spi_master_put(master);
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err3:
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disable_pm:
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pm_runtime_disable(&pdev->dev);
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dma_chnl_free:
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kfree(mcspi->dma_channels);
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err2:
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release_mem_region(r->start, resource_size(r));
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unmap_io:
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iounmap(mcspi->base);
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err1:
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release_region:
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release_mem_region(r->start, resource_size(r));
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free_master:
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kfree(master);
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platform_set_drvdata(pdev, NULL);
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return status;
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}
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@ -1210,6 +1225,7 @@ static int __exit omap2_mcspi_remove(struct platform_device *pdev)
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dma_channels = mcspi->dma_channels;
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omap2_mcspi_disable_clocks(mcspi);
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pm_runtime_disable(&pdev->dev);
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r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
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release_mem_region(r->start, resource_size(r));
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@ -1217,6 +1233,8 @@ static int __exit omap2_mcspi_remove(struct platform_device *pdev)
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spi_unregister_master(master);
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iounmap(base);
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kfree(dma_channels);
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destroy_workqueue(mcspi->wq);
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platform_set_drvdata(pdev, NULL);
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return 0;
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}
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@ -1275,10 +1293,6 @@ static struct platform_driver omap2_mcspi_driver = {
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static int __init omap2_mcspi_init(void)
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{
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omap2_mcspi_wq = create_singlethread_workqueue(
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omap2_mcspi_driver.driver.name);
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if (omap2_mcspi_wq == NULL)
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return -1;
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return platform_driver_probe(&omap2_mcspi_driver, omap2_mcspi_probe);
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}
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subsys_initcall(omap2_mcspi_init);
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@ -1287,7 +1301,6 @@ static void __exit omap2_mcspi_exit(void)
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{
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platform_driver_unregister(&omap2_mcspi_driver);
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destroy_workqueue(omap2_mcspi_wq);
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}
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module_exit(omap2_mcspi_exit);
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@ -1,7 +1,7 @@
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/*
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* SPI bus driver for the Topcliff PCH used by Intel SoCs
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*
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* Copyright (C) 2010 OKI SEMICONDUCTOR Co., LTD.
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* Copyright (C) 2011 LAPIS Semiconductor Co., Ltd.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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@ -95,16 +95,18 @@
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#define PCH_CLOCK_HZ 50000000
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#define PCH_MAX_SPBR 1023
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/* Definition for ML7213 by OKI SEMICONDUCTOR */
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/* Definition for ML7213/ML7223/ML7831 by LAPIS Semiconductor */
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#define PCI_VENDOR_ID_ROHM 0x10DB
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#define PCI_DEVICE_ID_ML7213_SPI 0x802c
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#define PCI_DEVICE_ID_ML7223_SPI 0x800F
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#define PCI_DEVICE_ID_ML7831_SPI 0x8816
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/*
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* Set the number of SPI instance max
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* Intel EG20T PCH : 1ch
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* OKI SEMICONDUCTOR ML7213 IOH : 2ch
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* OKI SEMICONDUCTOR ML7223 IOH : 1ch
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* LAPIS Semiconductor ML7213 IOH : 2ch
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* LAPIS Semiconductor ML7223 IOH : 1ch
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* LAPIS Semiconductor ML7831 IOH : 1ch
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*/
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#define PCH_SPI_MAX_DEV 2
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@ -218,6 +220,7 @@ static struct pci_device_id pch_spi_pcidev_id[] = {
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{ PCI_VDEVICE(INTEL, PCI_DEVICE_ID_GE_SPI), 1, },
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{ PCI_VDEVICE(ROHM, PCI_DEVICE_ID_ML7213_SPI), 2, },
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{ PCI_VDEVICE(ROHM, PCI_DEVICE_ID_ML7223_SPI), 1, },
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{ PCI_VDEVICE(ROHM, PCI_DEVICE_ID_ML7831_SPI), 1, },
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{ }
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};
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@ -1753,4 +1756,4 @@ MODULE_PARM_DESC(use_dma,
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"to use DMA for data transfers pass 1 else 0; default 1");
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MODULE_LICENSE("GPL");
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MODULE_DESCRIPTION("Intel EG20T PCH/OKI SEMICONDUCTOR ML7xxx IOH SPI Driver");
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MODULE_DESCRIPTION("Intel EG20T PCH/LAPIS Semiconductor ML7xxx IOH SPI Driver");
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