forked from luck/tmp_suning_uos_patched
Use ELF_BASE_PLATFORM to pass ISA level
Some userland application/program runtime/dynamic loaded need to know about the current ISA level to use the best runtime. While kernel doesn't provides this info. ELF_PLATFORM only provides some info about the CPU, with very few info, for example, the value is "mips" for both 24Kc and P6600. Currently ELF_BASE_PLATFORM is not used by MIPS (only by powerpc). So we cant set its value as: mips2, mips3, mips4, mips5, mips32, mips32r2, mips32r6 mips64, mips64r2, mips64r6 Then in userland, we can get it by: getauxval(AT_BASE_PLATFORM) The only problem is that it seems has different defination than ppc: on ppc, it is the mircoarchitecture while now we use it as ISA level on MIPS. Signed-off-by: YunQiang Su <syq@debian.org> Reviewed-by: Jiaxun Yang <jiaxun.yang@flygoat.com> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
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@ -445,6 +445,9 @@ extern unsigned int elf_hwcap;
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#define ELF_PLATFORM __elf_platform
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extern const char *__elf_platform;
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#define ELF_BASE_PLATFORM __elf_base_platform
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extern const char *__elf_base_platform;
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/*
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* See comments in asm-alpha/elf.h, this is the same thing
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* on the MIPS.
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@ -513,6 +513,13 @@ static inline void set_elf_platform(int cpu, const char *plat)
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__elf_platform = plat;
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}
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static inline void set_elf_base_platform(const char *plat)
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{
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if (__elf_base_platform == NULL) {
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__elf_base_platform = plat;
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}
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}
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static inline void cpu_probe_vmbits(struct cpuinfo_mips *c)
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{
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#ifdef __NEED_VMBITS_PROBE
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@ -527,36 +534,46 @@ static void set_isa(struct cpuinfo_mips *c, unsigned int isa)
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switch (isa) {
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case MIPS_CPU_ISA_M64R2:
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c->isa_level |= MIPS_CPU_ISA_M32R2 | MIPS_CPU_ISA_M64R2;
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set_elf_base_platform("mips64r2");
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/* fall through */
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case MIPS_CPU_ISA_M64R1:
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c->isa_level |= MIPS_CPU_ISA_M32R1 | MIPS_CPU_ISA_M64R1;
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set_elf_base_platform("mips64");
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/* fall through */
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case MIPS_CPU_ISA_V:
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c->isa_level |= MIPS_CPU_ISA_V;
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set_elf_base_platform("mips5");
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/* fall through */
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case MIPS_CPU_ISA_IV:
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c->isa_level |= MIPS_CPU_ISA_IV;
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set_elf_base_platform("mips4");
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/* fall through */
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case MIPS_CPU_ISA_III:
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c->isa_level |= MIPS_CPU_ISA_II | MIPS_CPU_ISA_III;
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set_elf_base_platform("mips3");
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break;
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/* R6 incompatible with everything else */
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case MIPS_CPU_ISA_M64R6:
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c->isa_level |= MIPS_CPU_ISA_M32R6 | MIPS_CPU_ISA_M64R6;
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set_elf_base_platform("mips64r6");
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/* fall through */
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case MIPS_CPU_ISA_M32R6:
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c->isa_level |= MIPS_CPU_ISA_M32R6;
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set_elf_base_platform("mips32r6");
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/* Break here so we don't add incompatible ISAs */
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break;
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case MIPS_CPU_ISA_M32R2:
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c->isa_level |= MIPS_CPU_ISA_M32R2;
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set_elf_base_platform("mips32r2");
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/* fall through */
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case MIPS_CPU_ISA_M32R1:
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c->isa_level |= MIPS_CPU_ISA_M32R1;
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set_elf_base_platform("mips32");
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/* fall through */
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case MIPS_CPU_ISA_II:
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c->isa_level |= MIPS_CPU_ISA_II;
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set_elf_base_platform("mips2");
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break;
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}
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}
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@ -2113,6 +2130,7 @@ EXPORT_SYMBOL(__ua_limit);
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const char *__cpu_name[NR_CPUS];
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const char *__elf_platform;
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const char *__elf_base_platform;
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void cpu_probe(void)
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{
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