forked from luck/tmp_suning_uos_patched
PCI: pciehp: remove unused pciehp_get_max_lnk_width(), pciehp_get_cur_lnk_width()
Signed-off-by: Yinghai Lu <yinghai@kernel.org> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Cc: Kenji Kaneshige <kaneshige.kenji@jp.fujitsu.com>
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@ -149,10 +149,6 @@ int pciehp_get_attention_status(struct slot *slot, u8 *status);
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int pciehp_set_attention_status(struct slot *slot, u8 status);
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int pciehp_get_latch_status(struct slot *slot, u8 *status);
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int pciehp_get_adapter_status(struct slot *slot, u8 *status);
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int pciehp_get_max_link_speed(struct slot *slot, enum pci_bus_speed *speed);
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int pciehp_get_max_link_width(struct slot *slot, enum pcie_link_width *val);
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int pciehp_get_cur_link_speed(struct slot *slot, enum pci_bus_speed *speed);
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int pciehp_get_cur_link_width(struct slot *slot, enum pcie_link_width *val);
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int pciehp_query_power_fault(struct slot *slot);
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void pciehp_green_led_on(struct slot *slot);
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void pciehp_green_led_off(struct slot *slot);
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@ -705,107 +705,6 @@ static irqreturn_t pcie_isr(int irq, void *dev_id)
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return IRQ_HANDLED;
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}
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int pciehp_get_max_lnk_width(struct slot *slot,
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enum pcie_link_width *value)
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{
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struct controller *ctrl = slot->ctrl;
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enum pcie_link_width lnk_wdth;
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u32 lnk_cap;
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int retval = 0;
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retval = pciehp_readl(ctrl, PCI_EXP_LNKCAP, &lnk_cap);
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if (retval) {
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ctrl_err(ctrl, "%s: Cannot read LNKCAP register\n", __func__);
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return retval;
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}
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switch ((lnk_cap & PCI_EXP_LNKSTA_NLW) >> 4){
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case 0:
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lnk_wdth = PCIE_LNK_WIDTH_RESRV;
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break;
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case 1:
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lnk_wdth = PCIE_LNK_X1;
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break;
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case 2:
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lnk_wdth = PCIE_LNK_X2;
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break;
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case 4:
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lnk_wdth = PCIE_LNK_X4;
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break;
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case 8:
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lnk_wdth = PCIE_LNK_X8;
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break;
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case 12:
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lnk_wdth = PCIE_LNK_X12;
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break;
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case 16:
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lnk_wdth = PCIE_LNK_X16;
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break;
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case 32:
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lnk_wdth = PCIE_LNK_X32;
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break;
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default:
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lnk_wdth = PCIE_LNK_WIDTH_UNKNOWN;
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break;
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}
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*value = lnk_wdth;
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ctrl_dbg(ctrl, "Max link width = %d\n", lnk_wdth);
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return retval;
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}
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int pciehp_get_cur_lnk_width(struct slot *slot,
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enum pcie_link_width *value)
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{
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struct controller *ctrl = slot->ctrl;
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enum pcie_link_width lnk_wdth = PCIE_LNK_WIDTH_UNKNOWN;
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int retval = 0;
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u16 lnk_status;
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retval = pciehp_readw(ctrl, PCI_EXP_LNKSTA, &lnk_status);
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if (retval) {
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ctrl_err(ctrl, "%s: Cannot read LNKSTATUS register\n",
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__func__);
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return retval;
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}
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switch ((lnk_status & PCI_EXP_LNKSTA_NLW) >> 4){
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case 0:
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lnk_wdth = PCIE_LNK_WIDTH_RESRV;
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break;
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case 1:
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lnk_wdth = PCIE_LNK_X1;
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break;
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case 2:
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lnk_wdth = PCIE_LNK_X2;
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break;
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case 4:
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lnk_wdth = PCIE_LNK_X4;
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break;
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case 8:
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lnk_wdth = PCIE_LNK_X8;
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break;
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case 12:
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lnk_wdth = PCIE_LNK_X12;
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break;
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case 16:
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lnk_wdth = PCIE_LNK_X16;
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break;
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case 32:
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lnk_wdth = PCIE_LNK_X32;
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break;
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default:
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lnk_wdth = PCIE_LNK_WIDTH_UNKNOWN;
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break;
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}
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*value = lnk_wdth;
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ctrl_dbg(ctrl, "Current link width = %d\n", lnk_wdth);
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return retval;
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}
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int pcie_enable_notification(struct controller *ctrl)
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{
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u16 cmd, mask;
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