forked from luck/tmp_suning_uos_patched
mmc: sunxi: Fix setup of last descriptor of dma transfer
The last descriptor might be the first descriptor as well, so use masking to add the LD (last descriptor) bit and drop the DIC (disable interrupt on completion) bit rather then hard assignment as hard assignment will override the FD (first descriptor) bit if there is only 1 descriptor. Also set the ER (end of ring) bit and clear buf_addr_ptr2 on the last descriptor, like the android kernel code does. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: David Lanzendörfer <david.lanzendoerfer@o2s.ch> Reported-by: <lixiang@allwinnertech.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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@ -310,7 +310,9 @@ static void sunxi_mmc_init_idma_des(struct sunxi_mmc_host *host,
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}
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pdes[0].config |= SDXC_IDMAC_DES0_FD;
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pdes[i - 1].config = SDXC_IDMAC_DES0_OWN | SDXC_IDMAC_DES0_LD;
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pdes[i - 1].config |= SDXC_IDMAC_DES0_LD | SDXC_IDMAC_DES0_ER;
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pdes[i - 1].config &= ~SDXC_IDMAC_DES0_DIC;
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pdes[i - 1].buf_addr_ptr2 = 0;
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/*
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* Avoid the io-store starting the idmac hitting io-mem before the
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