forked from luck/tmp_suning_uos_patched
MIPS: Netlogic: Enable access to more than 64GB
The ELPA bit needs to be set in the PAGEGRAIN register to enable access to >64GB physical address. Update reset.S to do this from every hardware thread. Signed-off-by: Jayachandran C <jchandra@broadcom.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/6866/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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@ -73,6 +73,18 @@
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mtcr t1, t0
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.endm
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/*
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* Allow access to physical mem >64G by enabling ELPA in PAGEGRAIN
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* register. This is needed before going to C code since the SP can
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* in this region. Called from all HW threads.
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*/
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.macro xlp_early_mmu_init
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mfc0 t0, CP0_PAGEMASK, 1
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li t1, (1 << 29) /* ELPA bit */
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or t0, t1
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mtc0 t0, CP0_PAGEMASK, 1
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.endm
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/*
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* L1D cache has to be flushed before enabling threads in XLP.
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* On XLP8xx/XLP3xx, we do a low level flush using processor control
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@ -228,6 +240,8 @@ EXPORT(nlm_boot_siblings)
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#endif
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mtc0 t1, CP0_STATUS
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xlp_early_mmu_init
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/* mark CPU ready */
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li t3, CKSEG1ADDR(RESET_DATA_PHYS)
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ADDIU t1, t3, BOOT_CPU_READY
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@ -254,6 +268,7 @@ EXPORT(nlm_reset_entry_end)
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LEAF(nlm_init_boot_cpu)
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#ifdef CONFIG_CPU_XLP
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xlp_config_lsu
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xlp_early_mmu_init
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#endif
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jr ra
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nop
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