AcoSail/kernel_optimize_test
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Merge branch 'merge' of git://git.kernel.org/pub/scm/linux/kernel/git/benh/powerpc

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* 'merge' of git://git.kernel.org/pub/scm/linux/kernel/git/benh/powerpc:
  powerpc/fsl-booke: Fix address issue when using relocatable kernels
  powerpc/cpm1: Mark micropatch code/data static and __init
  powerpc/cpm1: Fix build with various CONFIG_*_UCODE_PATCH combinations
  powerpc/cpm: Reintroduce global spi_pram struct (fixes build issue)
This commit is contained in:
Linus Torvalds 2010-07-14 17:27:29 -07:00
commit ea4c1a7e14
5 changed files with 45 additions and 38 deletions
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24
arch/powerpc/include/asm/cpm.h
View File

@ -6,6 +6,30 @@
#include <linux/errno.h>
#include <linux/of.h>
/*
* SPI Parameter RAM common to QE and CPM.
*/
struct spi_pram {
__be16 rbase; /* Rx Buffer descriptor base address */
__be16 tbase; /* Tx Buffer descriptor base address */
u8 rfcr; /* Rx function code */
u8 tfcr; /* Tx function code */
__be16 mrblr; /* Max receive buffer length */
__be32 rstate; /* Internal */
__be32 rdp; /* Internal */
__be16 rbptr; /* Internal */
__be16 rbc; /* Internal */
__be32 rxtmp; /* Internal */
__be32 tstate; /* Internal */
__be32 tdp; /* Internal */
__be16 tbptr; /* Internal */
__be16 tbc; /* Internal */
__be32 txtmp; /* Internal */
__be32 res; /* Tx temp. */
__be16 rpbase; /* Relocation pointer (CPM1 only) */
__be16 res1; /* Reserved */
};
/*
* USB Controller pram common to QE and CPM.
*/

3
arch/powerpc/include/asm/cpm1.h
View File

@ -17,6 +17,7 @@
#ifndef __CPM1__
#define __CPM1__
#include <linux/init.h>
#include <asm/8xx_immap.h>
#include <asm/ptrace.h>
#include <asm/cpm.h>
@ -54,7 +55,7 @@ extern cpm8xx_t __iomem *cpmp; /* Pointer to comm processor */
extern void cpm_setbrg(uint brg, uint rate);
extern void cpm_load_patch(cpm8xx_t *cp);
extern void __init cpm_load_patch(cpm8xx_t *cp);
extern void cpm_reset(void);

4
arch/powerpc/kernel/fsl_booke_entry_mapping.S
View File

@ -205,8 +205,7 @@ next_tlb_setup:
bdnz+ next_tlb_setup
/* 7. Jump to our 1:1 mapping */
li r6, 0
mr r6, r25
#else
#error You need to specify the mapping or not use this at all.
#endif
@ -217,7 +216,6 @@ next_tlb_setup:
1: mflr r9
rlwimi r6,r9,0,20,31
addi r6,r6,(2f - 1b)
add r6, r6, r25
mtspr SPRN_SRR0,r6
mtspr SPRN_SRR1,r7
rfi /* start execution out of TLB1[0] entry */

30
arch/powerpc/sysdev/micropatch.c
View File

@ -4,6 +4,7 @@
* also relocates SMC2, but this would require additional changes
* to uart.c, so I am holding off on that for a moment.
*/
#include <linux/init.h>
#include <linux/errno.h>
#include <linux/sched.h>
#include <linux/kernel.h>
@ -16,6 +17,7 @@
#include <asm/page.h>
#include <asm/pgtable.h>
#include <asm/8xx_immap.h>
#include <asm/cpm.h>
#include <asm/cpm1.h>
/*
@ -24,7 +26,7 @@
#ifdef CONFIG_I2C_SPI_UCODE_PATCH
uint patch_2000[] = {
static uint patch_2000[] __initdata = {
0x7FFFEFD9,
0x3FFD0000,
0x7FFB49F7,
@ -143,7 +145,7 @@ uint patch_2000[] = {
0x5F8247F8
};
uint patch_2f00[] = {
static uint patch_2f00[] __initdata = {
0x3E303430,
0x34343737,
0xABF7BF9B,
@ -182,7 +184,7 @@ uint patch_2f00[] = {
#ifdef CONFIG_I2C_SPI_SMC1_UCODE_PATCH
uint patch_2000[] = {
static uint patch_2000[] __initdata = {
0x3fff0000,
0x3ffd0000,
0x3ffb0000,
@ -505,7 +507,7 @@ uint patch_2000[] = {
0x6079e2bb
};
uint patch_2f00[] = {
static uint patch_2f00[] __initdata = {
0x30303030,
0x3e3e3434,
0xabbf9b99,
@ -572,7 +574,7 @@ uint patch_2f00[] = {
0xf22f3f23
};
uint patch_2e00[] = {
static uint patch_2e00[] __initdata = {
0x27eeeeee,
0xeeeeeeee,
0xeeeeeeee,
@ -598,7 +600,7 @@ uint patch_2e00[] = {
#ifdef CONFIG_USB_SOF_UCODE_PATCH
uint patch_2000[] = {
static uint patch_2000[] __initdata = {
0x7fff0000,
0x7ffd0000,
0x7ffb0000,
@ -613,21 +615,25 @@ uint patch_2000[] = {
0x60750000
};
uint patch_2f00[] = {
static uint patch_2f00[] __initdata = {
0x3030304c,
0xcab9e441,
0xa1aaf220
};
#endif
void
cpm_load_patch(cpm8xx_t *cp)
void __init cpm_load_patch(cpm8xx_t *cp)
{
volatile uint *dp; /* Dual-ported RAM. */
volatile cpm8xx_t *commproc;
#if defined(CONFIG_I2C_SPI_UCODE_PATCH) || \
defined(CONFIG_I2C_SPI_SMC1_UCODE_PATCH)
volatile iic_t *iip;
volatile spi_t *spp;
volatile struct spi_pram *spp;
#ifdef CONFIG_I2C_SPI_SMC1_UCODE_PATCH
volatile smc_uart_t *smp;
#endif
#endif
int i;
commproc = cp;
@ -668,8 +674,8 @@ cpm_load_patch(cpm8xx_t *cp)
/* Put SPI above the IIC, also 32-byte aligned.
*/
i = (RPBASE + sizeof(iic_t) + 31) & ~31;
spp = (spi_t *)&commproc->cp_dparam[PROFF_SPI];
spp->spi_rpbase = i;
spp = (struct spi_pram *)&commproc->cp_dparam[PROFF_SPI];
spp->rpbase = i;
# if defined(CONFIG_I2C_SPI_UCODE_PATCH)
commproc->cp_cpmcr1 = 0x802a;

22
drivers/spi/spi_mpc8xxx.c
View File

@ -66,28 +66,6 @@ struct mpc8xxx_spi_reg {
__be32 receive;
};
/* SPI Parameter RAM */
struct spi_pram {
__be16 rbase; /* Rx Buffer descriptor base address */
__be16 tbase; /* Tx Buffer descriptor base address */
u8 rfcr; /* Rx function code */
u8 tfcr; /* Tx function code */
__be16 mrblr; /* Max receive buffer length */
__be32 rstate; /* Internal */
__be32 rdp; /* Internal */
__be16 rbptr; /* Internal */
__be16 rbc; /* Internal */
__be32 rxtmp; /* Internal */
__be32 tstate; /* Internal */
__be32 tdp; /* Internal */
__be16 tbptr; /* Internal */
__be16 tbc; /* Internal */
__be32 txtmp; /* Internal */
__be32 res; /* Tx temp. */
__be16 rpbase; /* Relocation pointer (CPM1 only) */
__be16 res1; /* Reserved */
};
/* SPI Controller mode register definitions */
#define SPMODE_LOOP (1 << 30)
#define SPMODE_CI_INACTIVEHIGH (1 << 29)