forked from luck/tmp_suning_uos_patched
Merge branch 'pci/misc' into next
* pci/misc: PCI: Enable upstream bridges even for VFs on virtual buses PCI: Add pci_upstream_bridge() PCI: Add x86_msi.msi_mask_irq() and msix_mask_irq()
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commit
eaaeb1cb33
@ -172,6 +172,7 @@ struct x86_platform_ops {
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struct pci_dev;
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struct msi_msg;
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struct msi_desc;
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struct x86_msi_ops {
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int (*setup_msi_irqs)(struct pci_dev *dev, int nvec, int type);
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@ -182,6 +183,8 @@ struct x86_msi_ops {
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void (*teardown_msi_irqs)(struct pci_dev *dev);
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void (*restore_msi_irqs)(struct pci_dev *dev, int irq);
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int (*setup_hpet_msi)(unsigned int irq, unsigned int id);
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u32 (*msi_mask_irq)(struct msi_desc *desc, u32 mask, u32 flag);
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u32 (*msix_mask_irq)(struct msi_desc *desc, u32 flag);
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};
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struct IO_APIC_route_entry;
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@ -116,6 +116,8 @@ struct x86_msi_ops x86_msi = {
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.teardown_msi_irqs = default_teardown_msi_irqs,
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.restore_msi_irqs = default_restore_msi_irqs,
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.setup_hpet_msi = default_setup_hpet_msi,
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.msi_mask_irq = default_msi_mask_irq,
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.msix_mask_irq = default_msix_mask_irq,
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};
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/* MSI arch specific hooks */
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@ -138,6 +140,14 @@ void arch_restore_msi_irqs(struct pci_dev *dev, int irq)
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{
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x86_msi.restore_msi_irqs(dev, irq);
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}
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u32 arch_msi_mask_irq(struct msi_desc *desc, u32 mask, u32 flag)
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{
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return x86_msi.msi_mask_irq(desc, mask, flag);
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}
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u32 arch_msix_mask_irq(struct msi_desc *desc, u32 flag)
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{
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return x86_msi.msix_mask_irq(desc, flag);
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}
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#endif
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struct x86_io_apic_ops x86_io_apic_ops = {
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@ -382,7 +382,14 @@ static void xen_teardown_msi_irq(unsigned int irq)
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{
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xen_destroy_irq(irq);
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}
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static u32 xen_nop_msi_mask_irq(struct msi_desc *desc, u32 mask, u32 flag)
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{
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return 0;
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}
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static u32 xen_nop_msix_mask_irq(struct msi_desc *desc, u32 flag)
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{
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return 0;
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}
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#endif
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int __init pci_xen_init(void)
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@ -406,6 +413,8 @@ int __init pci_xen_init(void)
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x86_msi.setup_msi_irqs = xen_setup_msi_irqs;
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x86_msi.teardown_msi_irq = xen_teardown_msi_irq;
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x86_msi.teardown_msi_irqs = xen_teardown_msi_irqs;
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x86_msi.msi_mask_irq = xen_nop_msi_mask_irq;
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x86_msi.msix_mask_irq = xen_nop_msix_mask_irq;
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#endif
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return 0;
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}
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@ -485,6 +494,8 @@ int __init pci_xen_initial_domain(void)
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x86_msi.setup_msi_irqs = xen_initdom_setup_msi_irqs;
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x86_msi.teardown_msi_irq = xen_teardown_msi_irq;
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x86_msi.restore_msi_irqs = xen_initdom_restore_msi_irqs;
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x86_msi.msi_mask_irq = xen_nop_msi_mask_irq;
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x86_msi.msix_mask_irq = xen_nop_msix_mask_irq;
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#endif
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xen_setup_acpi_sci();
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__acpi_register_gsi = acpi_register_gsi_xen;
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@ -185,7 +185,7 @@ static inline __attribute_const__ u32 msi_enabled_mask(u16 control)
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* reliably as devices without an INTx disable bit will then generate a
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* level IRQ which will never be cleared.
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*/
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static u32 __msi_mask_irq(struct msi_desc *desc, u32 mask, u32 flag)
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u32 default_msi_mask_irq(struct msi_desc *desc, u32 mask, u32 flag)
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{
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u32 mask_bits = desc->masked;
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@ -199,9 +199,14 @@ static u32 __msi_mask_irq(struct msi_desc *desc, u32 mask, u32 flag)
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return mask_bits;
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}
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__weak u32 arch_msi_mask_irq(struct msi_desc *desc, u32 mask, u32 flag)
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{
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return default_msi_mask_irq(desc, mask, flag);
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}
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static void msi_mask_irq(struct msi_desc *desc, u32 mask, u32 flag)
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{
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desc->masked = __msi_mask_irq(desc, mask, flag);
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desc->masked = arch_msi_mask_irq(desc, mask, flag);
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}
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/*
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@ -211,7 +216,7 @@ static void msi_mask_irq(struct msi_desc *desc, u32 mask, u32 flag)
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* file. This saves a few milliseconds when initialising devices with lots
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* of MSI-X interrupts.
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*/
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static u32 __msix_mask_irq(struct msi_desc *desc, u32 flag)
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u32 default_msix_mask_irq(struct msi_desc *desc, u32 flag)
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{
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u32 mask_bits = desc->masked;
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unsigned offset = desc->msi_attrib.entry_nr * PCI_MSIX_ENTRY_SIZE +
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@ -224,9 +229,14 @@ static u32 __msix_mask_irq(struct msi_desc *desc, u32 flag)
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return mask_bits;
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}
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__weak u32 arch_msix_mask_irq(struct msi_desc *desc, u32 flag)
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{
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return default_msix_mask_irq(desc, flag);
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}
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static void msix_mask_irq(struct msi_desc *desc, u32 flag)
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{
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desc->masked = __msix_mask_irq(desc, flag);
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desc->masked = arch_msix_mask_irq(desc, flag);
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}
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static void msi_set_mask_bit(struct irq_data *data, u32 flag)
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@ -902,7 +912,7 @@ void pci_msi_shutdown(struct pci_dev *dev)
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pci_read_config_word(dev, dev->msi_cap + PCI_MSI_FLAGS, &ctrl);
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mask = msi_capable_mask(ctrl);
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/* Keep cached state to be restored */
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__msi_mask_irq(desc, mask, ~mask);
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arch_msi_mask_irq(desc, mask, ~mask);
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/* Restore dev->irq to its default pin-assertion irq */
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dev->irq = desc->msi_attrib.default_irq;
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@ -998,7 +1008,7 @@ void pci_msix_shutdown(struct pci_dev *dev)
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/* Return the device with MSI-X masked as initial states */
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list_for_each_entry(entry, &dev->msi_list, list) {
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/* Keep cached states to be restored */
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__msix_mask_irq(entry, 1);
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arch_msix_mask_irq(entry, 1);
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}
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msix_set_enable(dev, 0);
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@ -1148,12 +1148,12 @@ int pci_reenable_device(struct pci_dev *dev)
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static void pci_enable_bridge(struct pci_dev *dev)
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{
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struct pci_dev *bridge;
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int retval;
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if (!dev)
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return;
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pci_enable_bridge(dev->bus->self);
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bridge = pci_upstream_bridge(dev);
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if (bridge)
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pci_enable_bridge(bridge);
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if (pci_is_enabled(dev)) {
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if (!dev->is_busmaster)
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@ -1170,6 +1170,7 @@ static void pci_enable_bridge(struct pci_dev *dev)
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static int pci_enable_device_flags(struct pci_dev *dev, unsigned long flags)
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{
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struct pci_dev *bridge;
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int err;
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int i, bars = 0;
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@ -1188,7 +1189,9 @@ static int pci_enable_device_flags(struct pci_dev *dev, unsigned long flags)
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if (atomic_inc_return(&dev->enable_cnt) > 1)
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return 0; /* already enabled */
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pci_enable_bridge(dev->bus->self);
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bridge = pci_upstream_bridge(dev);
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if (bridge)
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pci_enable_bridge(bridge);
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/* only skip sriov related */
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for (i = 0; i <= PCI_ROM_RESOURCE; i++)
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@ -64,6 +64,8 @@ void arch_restore_msi_irqs(struct pci_dev *dev, int irq);
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void default_teardown_msi_irqs(struct pci_dev *dev);
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void default_restore_msi_irqs(struct pci_dev *dev, int irq);
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u32 default_msi_mask_irq(struct msi_desc *desc, u32 mask, u32 flag);
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u32 default_msix_mask_irq(struct msi_desc *desc, u32 flag);
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struct msi_chip {
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struct module *owner;
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@ -480,6 +480,15 @@ static inline bool pci_is_root_bus(struct pci_bus *pbus)
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return !(pbus->parent);
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}
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static inline struct pci_dev *pci_upstream_bridge(struct pci_dev *dev)
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{
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dev = pci_physfn(dev);
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if (pci_is_root_bus(dev->bus))
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return NULL;
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return dev->bus->self;
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}
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#ifdef CONFIG_PCI_MSI
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static inline bool pci_dev_msi_enabled(struct pci_dev *pci_dev)
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{
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