forked from luck/tmp_suning_uos_patched
drm/panel: simple: Specify bus width and flags for EDT displays
The display has a 18-Bit parallel LCD interface, require DE to be active high and data driven by the controller on falling pixel clock edge (display samples on rising edge). Signed-off-by: Stefan Agner <stefan@agner.ch> Signed-off-by: Thierry Reding <treding@nvidia.com>
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@ -802,6 +802,8 @@ static const struct panel_desc edt_et057090dhu = {
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.width = 115,
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.height = 86,
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},
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.bus_format = MEDIA_BUS_FMT_RGB666_1X18,
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.bus_flags = DRM_BUS_FLAG_DE_HIGH | DRM_BUS_FLAG_PIXDATA_NEGEDGE,
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};
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static const struct drm_display_mode edt_etm0700g0dh6_mode = {
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@ -826,6 +828,8 @@ static const struct panel_desc edt_etm0700g0dh6 = {
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.width = 152,
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.height = 91,
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},
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.bus_format = MEDIA_BUS_FMT_RGB666_1X18,
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.bus_flags = DRM_BUS_FLAG_DE_HIGH | DRM_BUS_FLAG_PIXDATA_NEGEDGE,
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};
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static const struct drm_display_mode foxlink_fl500wvr00_a0t_mode = {
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