AcoSail/kernel_optimize_test
8
0
Fork 0
forked from luck/tmp_suning_uos_patched
Code Pull Requests Activity

Merge remote-tracking branches 'asoc/topic/tlv320aic32x4', 'asoc/topic/tlv320aic3x', 'asoc/topic/tlv320dac33', 'asoc/topic/topology' and 'asoc/topic/tscs42xx' into asoc-next

Browse Source
This commit is contained in:
Mark Brown 2018-03-28 10:31:04 +08:00
commit ec67b19f95
No known key found for this signature in database
GPG Key ID: 24D68B725D5487D0
5 changed files with 579 additions and 579 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

207
sound/soc/codecs/tlv320aic32x4.c
View File

@ -82,10 +82,10 @@ struct aic32x4_priv {
static int aic32x4_get_mfp1_gpio(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_value *ucontrol)
{
struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
struct snd_soc_component *component = snd_kcontrol_chip(kcontrol);
u8 val;
val = snd_soc_read(codec, AIC32X4_DINCTL);
val = snd_soc_component_read32(component, AIC32X4_DINCTL);
ucontrol->value.integer.value[0] = (val & 0x01);
@ -95,11 +95,11 @@ static int aic32x4_get_mfp1_gpio(struct snd_kcontrol *kcontrol,
static int aic32x4_set_mfp2_gpio(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_value *ucontrol)
{
struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
struct snd_soc_component *component = snd_kcontrol_chip(kcontrol);
u8 val;
u8 gpio_check;
val = snd_soc_read(codec, AIC32X4_DOUTCTL);
val = snd_soc_component_read32(component, AIC32X4_DOUTCTL);
gpio_check = (val & AIC32X4_MFP_GPIO_ENABLED);
if (gpio_check != AIC32X4_MFP_GPIO_ENABLED) {
printk(KERN_ERR "%s: MFP2 is not configure as a GPIO output\n",
@ -115,7 +115,7 @@ static int aic32x4_set_mfp2_gpio(struct snd_kcontrol *kcontrol,
else
val &= ~AIC32X4_MFP2_GPIO_OUT_HIGH;
snd_soc_write(codec, AIC32X4_DOUTCTL, val);
snd_soc_component_write(component, AIC32X4_DOUTCTL, val);
return 0;
};
@ -123,10 +123,10 @@ static int aic32x4_set_mfp2_gpio(struct snd_kcontrol *kcontrol,
static int aic32x4_get_mfp3_gpio(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_value *ucontrol)
{
struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
struct snd_soc_component *component = snd_kcontrol_chip(kcontrol);
u8 val;
val = snd_soc_read(codec, AIC32X4_SCLKCTL);
val = snd_soc_component_read32(component, AIC32X4_SCLKCTL);
ucontrol->value.integer.value[0] = (val & 0x01);
@ -136,11 +136,11 @@ static int aic32x4_get_mfp3_gpio(struct snd_kcontrol *kcontrol,
static int aic32x4_set_mfp4_gpio(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_value *ucontrol)
{
struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
struct snd_soc_component *component = snd_kcontrol_chip(kcontrol);
u8 val;
u8 gpio_check;
val = snd_soc_read(codec, AIC32X4_MISOCTL);
val = snd_soc_component_read32(component, AIC32X4_MISOCTL);
gpio_check = (val & AIC32X4_MFP_GPIO_ENABLED);
if (gpio_check != AIC32X4_MFP_GPIO_ENABLED) {
printk(KERN_ERR "%s: MFP4 is not configure as a GPIO output\n",
@ -156,7 +156,7 @@ static int aic32x4_set_mfp4_gpio(struct snd_kcontrol *kcontrol,
else
val &= ~AIC32X4_MFP5_GPIO_OUT_HIGH;
snd_soc_write(codec, AIC32X4_MISOCTL, val);
snd_soc_component_write(component, AIC32X4_MISOCTL, val);
return 0;
};
@ -164,10 +164,10 @@ static int aic32x4_set_mfp4_gpio(struct snd_kcontrol *kcontrol,
static int aic32x4_get_mfp5_gpio(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_value *ucontrol)
{
struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
struct snd_soc_component *component = snd_kcontrol_chip(kcontrol);
u8 val;
val = snd_soc_read(codec, AIC32X4_GPIOCTL);
val = snd_soc_component_read32(component, AIC32X4_GPIOCTL);
ucontrol->value.integer.value[0] = ((val & 0x2) >> 1);
return 0;
@ -176,11 +176,11 @@ static int aic32x4_get_mfp5_gpio(struct snd_kcontrol *kcontrol,
static int aic32x4_set_mfp5_gpio(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_value *ucontrol)
{
struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
struct snd_soc_component *component = snd_kcontrol_chip(kcontrol);
u8 val;
u8 gpio_check;
val = snd_soc_read(codec, AIC32X4_GPIOCTL);
val = snd_soc_component_read32(component, AIC32X4_GPIOCTL);
gpio_check = (val & AIC32X4_MFP5_GPIO_OUTPUT);
if (gpio_check != AIC32X4_MFP5_GPIO_OUTPUT) {
printk(KERN_ERR "%s: MFP5 is not configure as a GPIO output\n",
@ -196,7 +196,7 @@ static int aic32x4_set_mfp5_gpio(struct snd_kcontrol *kcontrol,
else
val &= 0xfe;
snd_soc_write(codec, AIC32X4_GPIOCTL, val);
snd_soc_component_write(component, AIC32X4_GPIOCTL, val);
return 0;
};
@ -597,8 +597,8 @@ static inline int aic32x4_get_divs(int mclk, int rate)
static int aic32x4_set_dai_sysclk(struct snd_soc_dai *codec_dai,
int clk_id, unsigned int freq, int dir)
{
struct snd_soc_codec *codec = codec_dai->codec;
struct aic32x4_priv *aic32x4 = snd_soc_codec_get_drvdata(codec);
struct snd_soc_component *component = codec_dai->component;
struct aic32x4_priv *aic32x4 = snd_soc_component_get_drvdata(component);
switch (freq) {
case 12000000:
@ -613,7 +613,7 @@ static int aic32x4_set_dai_sysclk(struct snd_soc_dai *codec_dai,
static int aic32x4_set_dai_fmt(struct snd_soc_dai *codec_dai, unsigned int fmt)
{
struct snd_soc_codec *codec = codec_dai->codec;
struct snd_soc_component *component = codec_dai->component;
u8 iface_reg_1 = 0;
u8 iface_reg_2 = 0;
u8 iface_reg_3 = 0;
@ -657,12 +657,12 @@ static int aic32x4_set_dai_fmt(struct snd_soc_dai *codec_dai, unsigned int fmt)
return -EINVAL;
}
snd_soc_update_bits(codec, AIC32X4_IFACE1,
snd_soc_component_update_bits(component, AIC32X4_IFACE1,
AIC32X4_IFACE1_DATATYPE_MASK |
AIC32X4_IFACE1_MASTER_MASK, iface_reg_1);
snd_soc_update_bits(codec, AIC32X4_IFACE2,
snd_soc_component_update_bits(component, AIC32X4_IFACE2,
AIC32X4_DATA_OFFSET_MASK, iface_reg_2);
snd_soc_update_bits(codec, AIC32X4_IFACE3,
snd_soc_component_update_bits(component, AIC32X4_IFACE3,
AIC32X4_BCLKINV_MASK, iface_reg_3);
return 0;
@ -672,8 +672,8 @@ static int aic32x4_hw_params(struct snd_pcm_substream *substream,
struct snd_pcm_hw_params *params,
struct snd_soc_dai *dai)
{
struct snd_soc_codec *codec = dai->codec;
struct aic32x4_priv *aic32x4 = snd_soc_codec_get_drvdata(codec);
struct snd_soc_component *component = dai->component;
struct aic32x4_priv *aic32x4 = snd_soc_component_get_drvdata(component);
u8 iface1_reg = 0;
u8 dacsetup_reg = 0;
int i;
@ -685,54 +685,54 @@ static int aic32x4_hw_params(struct snd_pcm_substream *substream,
}
/* MCLK as PLL_CLKIN */
snd_soc_update_bits(codec, AIC32X4_CLKMUX, AIC32X4_PLL_CLKIN_MASK,
snd_soc_component_update_bits(component, AIC32X4_CLKMUX, AIC32X4_PLL_CLKIN_MASK,
AIC32X4_PLL_CLKIN_MCLK << AIC32X4_PLL_CLKIN_SHIFT);
/* PLL as CODEC_CLKIN */
snd_soc_update_bits(codec, AIC32X4_CLKMUX, AIC32X4_CODEC_CLKIN_MASK,
snd_soc_component_update_bits(component, AIC32X4_CLKMUX, AIC32X4_CODEC_CLKIN_MASK,
AIC32X4_CODEC_CLKIN_PLL << AIC32X4_CODEC_CLKIN_SHIFT);
/* DAC_MOD_CLK as BDIV_CLKIN */
snd_soc_update_bits(codec, AIC32X4_IFACE3, AIC32X4_BDIVCLK_MASK,
snd_soc_component_update_bits(component, AIC32X4_IFACE3, AIC32X4_BDIVCLK_MASK,
AIC32X4_DACMOD2BCLK << AIC32X4_BDIVCLK_SHIFT);
/* We will fix R value to 1 and will make P & J=K.D as variable */
snd_soc_update_bits(codec, AIC32X4_PLLPR, AIC32X4_PLL_R_MASK, 0x01);
snd_soc_component_update_bits(component, AIC32X4_PLLPR, AIC32X4_PLL_R_MASK, 0x01);
/* PLL P value */
snd_soc_update_bits(codec, AIC32X4_PLLPR, AIC32X4_PLL_P_MASK,
snd_soc_component_update_bits(component, AIC32X4_PLLPR, AIC32X4_PLL_P_MASK,
aic32x4_divs[i].p_val << AIC32X4_PLL_P_SHIFT);
/* PLL J value */
snd_soc_write(codec, AIC32X4_PLLJ, aic32x4_divs[i].pll_j);
snd_soc_component_write(component, AIC32X4_PLLJ, aic32x4_divs[i].pll_j);
/* PLL D value */
snd_soc_write(codec, AIC32X4_PLLDMSB, (aic32x4_divs[i].pll_d >> 8));
snd_soc_write(codec, AIC32X4_PLLDLSB, (aic32x4_divs[i].pll_d & 0xff));
snd_soc_component_write(component, AIC32X4_PLLDMSB, (aic32x4_divs[i].pll_d >> 8));
snd_soc_component_write(component, AIC32X4_PLLDLSB, (aic32x4_divs[i].pll_d & 0xff));
/* NDAC divider value */
snd_soc_update_bits(codec, AIC32X4_NDAC,
snd_soc_component_update_bits(component, AIC32X4_NDAC,
AIC32X4_NDAC_MASK, aic32x4_divs[i].ndac);
/* MDAC divider value */
snd_soc_update_bits(codec, AIC32X4_MDAC,
snd_soc_component_update_bits(component, AIC32X4_MDAC,
AIC32X4_MDAC_MASK, aic32x4_divs[i].mdac);
/* DOSR MSB & LSB values */
snd_soc_write(codec, AIC32X4_DOSRMSB, aic32x4_divs[i].dosr >> 8);
snd_soc_write(codec, AIC32X4_DOSRLSB, (aic32x4_divs[i].dosr & 0xff));
snd_soc_component_write(component, AIC32X4_DOSRMSB, aic32x4_divs[i].dosr >> 8);
snd_soc_component_write(component, AIC32X4_DOSRLSB, (aic32x4_divs[i].dosr & 0xff));
/* NADC divider value */
snd_soc_update_bits(codec, AIC32X4_NADC,
snd_soc_component_update_bits(component, AIC32X4_NADC,
AIC32X4_NADC_MASK, aic32x4_divs[i].nadc);
/* MADC divider value */
snd_soc_update_bits(codec, AIC32X4_MADC,
snd_soc_component_update_bits(component, AIC32X4_MADC,
AIC32X4_MADC_MASK, aic32x4_divs[i].madc);
/* AOSR value */
snd_soc_write(codec, AIC32X4_AOSR, aic32x4_divs[i].aosr);
snd_soc_component_write(component, AIC32X4_AOSR, aic32x4_divs[i].aosr);
/* BCLK N divider */
snd_soc_update_bits(codec, AIC32X4_BCLKN,
snd_soc_component_update_bits(component, AIC32X4_BCLKN,
AIC32X4_BCLK_MASK, aic32x4_divs[i].blck_N);
switch (params_width(params)) {
@ -753,7 +753,7 @@ static int aic32x4_hw_params(struct snd_pcm_substream *substream,
AIC32X4_IFACE1_DATALEN_SHIFT);
break;
}
snd_soc_update_bits(codec, AIC32X4_IFACE1,
snd_soc_component_update_bits(component, AIC32X4_IFACE1,
AIC32X4_IFACE1_DATALEN_MASK, iface1_reg);
if (params_channels(params) == 1) {
@ -764,7 +764,7 @@ static int aic32x4_hw_params(struct snd_pcm_substream *substream,
else
dacsetup_reg = AIC32X4_LDAC2LCHN | AIC32X4_RDAC2RCHN;
}
snd_soc_update_bits(codec, AIC32X4_DACSETUP,
snd_soc_component_update_bits(component, AIC32X4_DACSETUP,
AIC32X4_DAC_CHAN_MASK, dacsetup_reg);
return 0;
@ -772,18 +772,18 @@ static int aic32x4_hw_params(struct snd_pcm_substream *substream,
static int aic32x4_mute(struct snd_soc_dai *dai, int mute)
{
struct snd_soc_codec *codec = dai->codec;
struct snd_soc_component *component = dai->component;
snd_soc_update_bits(codec, AIC32X4_DACMUTE,
snd_soc_component_update_bits(component, AIC32X4_DACMUTE,
AIC32X4_MUTEON, mute ? AIC32X4_MUTEON : 0);
return 0;
}
static int aic32x4_set_bias_level(struct snd_soc_codec *codec,
static int aic32x4_set_bias_level(struct snd_soc_component *component,
enum snd_soc_bias_level level)
{
struct aic32x4_priv *aic32x4 = snd_soc_codec_get_drvdata(codec);
struct aic32x4_priv *aic32x4 = snd_soc_component_get_drvdata(component);
int ret;
switch (level) {
@ -791,59 +791,59 @@ static int aic32x4_set_bias_level(struct snd_soc_codec *codec,
/* Switch on master clock */
ret = clk_prepare_enable(aic32x4->mclk);
if (ret) {
dev_err(codec->dev, "Failed to enable master clock\n");
dev_err(component->dev, "Failed to enable master clock\n");
return ret;
}
/* Switch on PLL */
snd_soc_update_bits(codec, AIC32X4_PLLPR,
snd_soc_component_update_bits(component, AIC32X4_PLLPR,
AIC32X4_PLLEN, AIC32X4_PLLEN);
/* Switch on NDAC Divider */
snd_soc_update_bits(codec, AIC32X4_NDAC,
snd_soc_component_update_bits(component, AIC32X4_NDAC,
AIC32X4_NDACEN, AIC32X4_NDACEN);
/* Switch on MDAC Divider */
snd_soc_update_bits(codec, AIC32X4_MDAC,
snd_soc_component_update_bits(component, AIC32X4_MDAC,
AIC32X4_MDACEN, AIC32X4_MDACEN);
/* Switch on NADC Divider */
snd_soc_update_bits(codec, AIC32X4_NADC,
snd_soc_component_update_bits(component, AIC32X4_NADC,
AIC32X4_NADCEN, AIC32X4_NADCEN);
/* Switch on MADC Divider */
snd_soc_update_bits(codec, AIC32X4_MADC,
snd_soc_component_update_bits(component, AIC32X4_MADC,
AIC32X4_MADCEN, AIC32X4_MADCEN);
/* Switch on BCLK_N Divider */
snd_soc_update_bits(codec, AIC32X4_BCLKN,
snd_soc_component_update_bits(component, AIC32X4_BCLKN,
AIC32X4_BCLKEN, AIC32X4_BCLKEN);
break;
case SND_SOC_BIAS_PREPARE:
break;
case SND_SOC_BIAS_STANDBY:
/* Switch off BCLK_N Divider */
snd_soc_update_bits(codec, AIC32X4_BCLKN,
snd_soc_component_update_bits(component, AIC32X4_BCLKN,
AIC32X4_BCLKEN, 0);
/* Switch off MADC Divider */
snd_soc_update_bits(codec, AIC32X4_MADC,
snd_soc_component_update_bits(component, AIC32X4_MADC,
AIC32X4_MADCEN, 0);
/* Switch off NADC Divider */
snd_soc_update_bits(codec, AIC32X4_NADC,
snd_soc_component_update_bits(component, AIC32X4_NADC,
AIC32X4_NADCEN, 0);
/* Switch off MDAC Divider */
snd_soc_update_bits(codec, AIC32X4_MDAC,
snd_soc_component_update_bits(component, AIC32X4_MDAC,
AIC32X4_MDACEN, 0);
/* Switch off NDAC Divider */
snd_soc_update_bits(codec, AIC32X4_NDAC,
snd_soc_component_update_bits(component, AIC32X4_NDAC,
AIC32X4_NDACEN, 0);
/* Switch off PLL */
snd_soc_update_bits(codec, AIC32X4_PLLPR,
snd_soc_component_update_bits(component, AIC32X4_PLLPR,
AIC32X4_PLLEN, 0);
/* Switch off master clock */
@ -884,55 +884,55 @@ static struct snd_soc_dai_driver aic32x4_dai = {
.symmetric_rates = 1,
};
static void aic32x4_setup_gpios(struct snd_soc_codec *codec)
static void aic32x4_setup_gpios(struct snd_soc_component *component)
{
struct aic32x4_priv *aic32x4 = snd_soc_codec_get_drvdata(codec);
struct aic32x4_priv *aic32x4 = snd_soc_component_get_drvdata(component);
/* setup GPIO functions */
/* MFP1 */
if (aic32x4->setup->gpio_func[0] != AIC32X4_MFPX_DEFAULT_VALUE) {
snd_soc_write(codec, AIC32X4_DINCTL,
snd_soc_component_write(component, AIC32X4_DINCTL,
aic32x4->setup->gpio_func[0]);
snd_soc_add_codec_controls(codec, aic32x4_mfp1,
snd_soc_add_component_controls(component, aic32x4_mfp1,
ARRAY_SIZE(aic32x4_mfp1));
}
/* MFP2 */
if (aic32x4->setup->gpio_func[1] != AIC32X4_MFPX_DEFAULT_VALUE) {
snd_soc_write(codec, AIC32X4_DOUTCTL,
snd_soc_component_write(component, AIC32X4_DOUTCTL,
aic32x4->setup->gpio_func[1]);
snd_soc_add_codec_controls(codec, aic32x4_mfp2,
snd_soc_add_component_controls(component, aic32x4_mfp2,
ARRAY_SIZE(aic32x4_mfp2));
}
/* MFP3 */
if (aic32x4->setup->gpio_func[2] != AIC32X4_MFPX_DEFAULT_VALUE) {
snd_soc_write(codec, AIC32X4_SCLKCTL,
snd_soc_component_write(component, AIC32X4_SCLKCTL,
aic32x4->setup->gpio_func[2]);
snd_soc_add_codec_controls(codec, aic32x4_mfp3,
snd_soc_add_component_controls(component, aic32x4_mfp3,
ARRAY_SIZE(aic32x4_mfp3));
}
/* MFP4 */
if (aic32x4->setup->gpio_func[3] != AIC32X4_MFPX_DEFAULT_VALUE) {
snd_soc_write(codec, AIC32X4_MISOCTL,
snd_soc_component_write(component, AIC32X4_MISOCTL,
aic32x4->setup->gpio_func[3]);
snd_soc_add_codec_controls(codec, aic32x4_mfp4,
snd_soc_add_component_controls(component, aic32x4_mfp4,
ARRAY_SIZE(aic32x4_mfp4));
}
/* MFP5 */
if (aic32x4->setup->gpio_func[4] != AIC32X4_MFPX_DEFAULT_VALUE) {
snd_soc_write(codec, AIC32X4_GPIOCTL,
snd_soc_component_write(component, AIC32X4_GPIOCTL,
aic32x4->setup->gpio_func[4]);
snd_soc_add_codec_controls(codec, aic32x4_mfp5,
snd_soc_add_component_controls(component, aic32x4_mfp5,
ARRAY_SIZE(aic32x4_mfp5));
}
}
static int aic32x4_codec_probe(struct snd_soc_codec *codec)
static int aic32x4_component_probe(struct snd_soc_component *component)
{
struct aic32x4_priv *aic32x4 = snd_soc_codec_get_drvdata(codec);
struct aic32x4_priv *aic32x4 = snd_soc_component_get_drvdata(component);
u32 tmp_reg;
if (gpio_is_valid(aic32x4->rstn_gpio)) {
@ -940,42 +940,42 @@ static int aic32x4_codec_probe(struct snd_soc_codec *codec)
gpio_set_value(aic32x4->rstn_gpio, 1);
}
snd_soc_write(codec, AIC32X4_RESET, 0x01);
snd_soc_component_write(component, AIC32X4_RESET, 0x01);
if (aic32x4->setup)
aic32x4_setup_gpios(codec);
aic32x4_setup_gpios(component);
/* Power platform configuration */
if (aic32x4->power_cfg & AIC32X4_PWR_MICBIAS_2075_LDOIN) {
snd_soc_write(codec, AIC32X4_MICBIAS, AIC32X4_MICBIAS_LDOIN |
snd_soc_component_write(component, AIC32X4_MICBIAS, AIC32X4_MICBIAS_LDOIN |
AIC32X4_MICBIAS_2075V);
}
if (aic32x4->power_cfg & AIC32X4_PWR_AVDD_DVDD_WEAK_DISABLE)
snd_soc_write(codec, AIC32X4_PWRCFG, AIC32X4_AVDDWEAKDISABLE);
snd_soc_component_write(component, AIC32X4_PWRCFG, AIC32X4_AVDDWEAKDISABLE);
tmp_reg = (aic32x4->power_cfg & AIC32X4_PWR_AIC32X4_LDO_ENABLE) ?
AIC32X4_LDOCTLEN : 0;
snd_soc_write(codec, AIC32X4_LDOCTL, tmp_reg);
snd_soc_component_write(component, AIC32X4_LDOCTL, tmp_reg);
tmp_reg = snd_soc_read(codec, AIC32X4_CMMODE);
tmp_reg = snd_soc_component_read32(component, AIC32X4_CMMODE);
if (aic32x4->power_cfg & AIC32X4_PWR_CMMODE_LDOIN_RANGE_18_36)
tmp_reg |= AIC32X4_LDOIN_18_36;
if (aic32x4->power_cfg & AIC32X4_PWR_CMMODE_HP_LDOIN_POWERED)
tmp_reg |= AIC32X4_LDOIN2HP;
snd_soc_write(codec, AIC32X4_CMMODE, tmp_reg);
snd_soc_component_write(component, AIC32X4_CMMODE, tmp_reg);
/* Mic PGA routing */
if (aic32x4->micpga_routing & AIC32X4_MICPGA_ROUTE_LMIC_IN2R_10K)
snd_soc_write(codec, AIC32X4_LMICPGANIN,
snd_soc_component_write(component, AIC32X4_LMICPGANIN,
AIC32X4_LMICPGANIN_IN2R_10K);
else
snd_soc_write(codec, AIC32X4_LMICPGANIN,
snd_soc_component_write(component, AIC32X4_LMICPGANIN,
AIC32X4_LMICPGANIN_CM1L_10K);
if (aic32x4->micpga_routing & AIC32X4_MICPGA_ROUTE_RMIC_IN1L_10K)
snd_soc_write(codec, AIC32X4_RMICPGANIN,
snd_soc_component_write(component, AIC32X4_RMICPGANIN,
AIC32X4_RMICPGANIN_IN1L_10K);
else
snd_soc_write(codec, AIC32X4_RMICPGANIN,
snd_soc_component_write(component, AIC32X4_RMICPGANIN,
AIC32X4_RMICPGANIN_CM1R_10K);
/*
@ -983,27 +983,28 @@ static int aic32x4_codec_probe(struct snd_soc_codec *codec)
* and down for the first capture to work properly. It seems related to
* a HW BUG or some kind of behavior not documented in the datasheet.
*/
tmp_reg = snd_soc_read(codec, AIC32X4_ADCSETUP);
snd_soc_write(codec, AIC32X4_ADCSETUP, tmp_reg |
tmp_reg = snd_soc_component_read32(component, AIC32X4_ADCSETUP);
snd_soc_component_write(component, AIC32X4_ADCSETUP, tmp_reg |
AIC32X4_LADC_EN | AIC32X4_RADC_EN);
snd_soc_write(codec, AIC32X4_ADCSETUP, tmp_reg);
snd_soc_component_write(component, AIC32X4_ADCSETUP, tmp_reg);
return 0;
}
static const struct snd_soc_codec_driver soc_codec_dev_aic32x4 = {
.probe = aic32x4_codec_probe,
.set_bias_level = aic32x4_set_bias_level,
.suspend_bias_off = true,
.component_driver = {
.controls = aic32x4_snd_controls,
.num_controls = ARRAY_SIZE(aic32x4_snd_controls),
.dapm_widgets = aic32x4_dapm_widgets,
.num_dapm_widgets = ARRAY_SIZE(aic32x4_dapm_widgets),
.dapm_routes = aic32x4_dapm_routes,
.num_dapm_routes = ARRAY_SIZE(aic32x4_dapm_routes),
},
static const struct snd_soc_component_driver soc_component_dev_aic32x4 = {
.probe = aic32x4_component_probe,
.set_bias_level = aic32x4_set_bias_level,
.controls = aic32x4_snd_controls,
.num_controls = ARRAY_SIZE(aic32x4_snd_controls),
.dapm_widgets = aic32x4_dapm_widgets,
.num_dapm_widgets = ARRAY_SIZE(aic32x4_dapm_widgets),
.dapm_routes = aic32x4_dapm_routes,
.num_dapm_routes = ARRAY_SIZE(aic32x4_dapm_routes),
.suspend_bias_off = 1,
.idle_bias_on = 1,
.use_pmdown_time = 1,
.endianness = 1,
.non_legacy_dai_naming = 1,
};
static int aic32x4_parse_dt(struct aic32x4_priv *aic32x4,
@ -1181,10 +1182,10 @@ int aic32x4_probe(struct device *dev, struct regmap *regmap)
return ret;
}
ret = snd_soc_register_codec(dev,
&soc_codec_dev_aic32x4, &aic32x4_dai, 1);
ret = devm_snd_soc_register_component(dev,
&soc_component_dev_aic32x4, &aic32x4_dai, 1);
if (ret) {
dev_err(dev, "Failed to register codec\n");
dev_err(dev, "Failed to register component\n");
aic32x4_disable_regulators(aic32x4);
return ret;
}
@ -1199,8 +1200,6 @@ int aic32x4_remove(struct device *dev)
aic32x4_disable_regulators(aic32x4);
snd_soc_unregister_codec(dev);
return 0;
}
EXPORT_SYMBOL(aic32x4_remove);

295
sound/soc/codecs/tlv320aic3x.c
View File

@ -72,7 +72,7 @@ struct aic3x_disable_nb {
/* codec private data */
struct aic3x_priv {
struct snd_soc_codec *codec;
struct snd_soc_component *component;
struct regmap *regmap;
struct regulator_bulk_data supplies[AIC3X_NUM_SUPPLIES];
struct aic3x_disable_nb disable_nb[AIC3X_NUM_SUPPLIES];
@ -162,8 +162,8 @@ static const struct regmap_config aic3x_regmap = {
static int snd_soc_dapm_put_volsw_aic3x(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_value *ucontrol)
{
struct snd_soc_codec *codec = snd_soc_dapm_kcontrol_codec(kcontrol);
struct snd_soc_dapm_context *dapm = snd_soc_codec_get_dapm(codec);
struct snd_soc_component *component = snd_soc_dapm_kcontrol_component(kcontrol);
struct snd_soc_dapm_context *dapm = snd_soc_component_get_dapm(component);
struct soc_mixer_control *mc =
(struct soc_mixer_control *)kcontrol->private_value;
unsigned int reg = mc->reg;
@ -172,7 +172,7 @@ static int snd_soc_dapm_put_volsw_aic3x(struct snd_kcontrol *kcontrol,
unsigned int mask = (1 << fls(max)) - 1;
unsigned int invert = mc->invert;
unsigned short val;
struct snd_soc_dapm_update update = { 0 };
struct snd_soc_dapm_update update = {};
int connect, change;
val = (ucontrol->value.integer.value[0] & mask);
@ -189,7 +189,7 @@ static int snd_soc_dapm_put_volsw_aic3x(struct snd_kcontrol *kcontrol,
mask <<= shift;
val <<= shift;
change = snd_soc_test_bits(codec, reg, mask, val);
change = snd_soc_component_test_bits(component, reg, mask, val);
if (change) {
update.kcontrol = kcontrol;
update.reg = reg;
@ -215,19 +215,19 @@ static int snd_soc_dapm_put_volsw_aic3x(struct snd_kcontrol *kcontrol,
static int mic_bias_event(struct snd_soc_dapm_widget *w,
struct snd_kcontrol *kcontrol, int event)
{
struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
struct aic3x_priv *aic3x = snd_soc_codec_get_drvdata(codec);
struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
struct aic3x_priv *aic3x = snd_soc_component_get_drvdata(component);
switch (event) {
case SND_SOC_DAPM_POST_PMU:
/* change mic bias voltage to user defined */
snd_soc_update_bits(codec, MICBIAS_CTRL,
snd_soc_component_update_bits(component, MICBIAS_CTRL,
MICBIAS_LEVEL_MASK,
aic3x->micbias_vg << MICBIAS_LEVEL_SHIFT);
break;
case SND_SOC_DAPM_PRE_PMD:
snd_soc_update_bits(codec, MICBIAS_CTRL,
snd_soc_component_update_bits(component, MICBIAS_CTRL,
MICBIAS_LEVEL_MASK, 0);
break;
}
@ -993,10 +993,10 @@ static const struct snd_soc_dapm_route intercon_3007[] = {
{"SPOM", NULL, "Right Class-D Out"},
};
static int aic3x_add_widgets(struct snd_soc_codec *codec)
static int aic3x_add_widgets(struct snd_soc_component *component)
{
struct aic3x_priv *aic3x = snd_soc_codec_get_drvdata(codec);
struct snd_soc_dapm_context *dapm = snd_soc_codec_get_dapm(codec);
struct aic3x_priv *aic3x = snd_soc_component_get_drvdata(component);
struct snd_soc_dapm_context *dapm = snd_soc_component_get_dapm(component);
switch (aic3x->model) {
case AIC3X_MODEL_3X:
@ -1035,8 +1035,8 @@ static int aic3x_hw_params(struct snd_pcm_substream *substream,
struct snd_pcm_hw_params *params,
struct snd_soc_dai *dai)
{
struct snd_soc_codec *codec = dai->codec;
struct aic3x_priv *aic3x = snd_soc_codec_get_drvdata(codec);
struct snd_soc_component *component = dai->component;
struct aic3x_priv *aic3x = snd_soc_component_get_drvdata(component);
int codec_clk = 0, bypass_pll = 0, fsref, last_clk = 0;
u8 data, j, r, p, pll_q, pll_p = 1, pll_r = 1, pll_j = 1;
u16 d, pll_d = 1;
@ -1047,7 +1047,7 @@ static int aic3x_hw_params(struct snd_pcm_substream *substream,
width = params_width(params);
/* select data word length */
data = snd_soc_read(codec, AIC3X_ASD_INTF_CTRLB) & (~(0x3 << 4));
data = snd_soc_component_read32(component, AIC3X_ASD_INTF_CTRLB) & (~(0x3 << 4));
switch (width) {
case 16:
break;
@ -1061,7 +1061,7 @@ static int aic3x_hw_params(struct snd_pcm_substream *substream,
data |= (0x03 << 4);
break;
}
snd_soc_write(codec, AIC3X_ASD_INTF_CTRLB, data);
snd_soc_component_write(component, AIC3X_ASD_INTF_CTRLB, data);
/* Fsref can be 44100 or 48000 */
fsref = (params_rate(params) % 11025 == 0) ? 44100 : 48000;
@ -1076,15 +1076,15 @@ static int aic3x_hw_params(struct snd_pcm_substream *substream,
if (bypass_pll) {
pll_q &= 0xf;
snd_soc_write(codec, AIC3X_PLL_PROGA_REG, pll_q << PLLQ_SHIFT);
snd_soc_write(codec, AIC3X_GPIOB_REG, CODEC_CLKIN_CLKDIV);
snd_soc_component_write(component, AIC3X_PLL_PROGA_REG, pll_q << PLLQ_SHIFT);
snd_soc_component_write(component, AIC3X_GPIOB_REG, CODEC_CLKIN_CLKDIV);
/* disable PLL if it is bypassed */
snd_soc_update_bits(codec, AIC3X_PLL_PROGA_REG, PLL_ENABLE, 0);
snd_soc_component_update_bits(component, AIC3X_PLL_PROGA_REG, PLL_ENABLE, 0);
} else {
snd_soc_write(codec, AIC3X_GPIOB_REG, CODEC_CLKIN_PLLDIV);
snd_soc_component_write(component, AIC3X_GPIOB_REG, CODEC_CLKIN_PLLDIV);
/* enable PLL when it is used */
snd_soc_update_bits(codec, AIC3X_PLL_PROGA_REG,
snd_soc_component_update_bits(component, AIC3X_PLL_PROGA_REG,
PLL_ENABLE, PLL_ENABLE);
}
@ -1094,7 +1094,7 @@ static int aic3x_hw_params(struct snd_pcm_substream *substream,
data |= (fsref == 44100) ? FSREF_44100 : FSREF_48000;
if (params_rate(params) >= 64000)
data |= DUAL_RATE_MODE;
snd_soc_write(codec, AIC3X_CODEC_DATAPATH_REG, data);
snd_soc_component_write(component, AIC3X_CODEC_DATAPATH_REG, data);
/* codec sample rate select */
data = (fsref * 20) / params_rate(params);
@ -1103,7 +1103,7 @@ static int aic3x_hw_params(struct snd_pcm_substream *substream,
data /= 5;
data -= 2;
data |= (data << 4);
snd_soc_write(codec, AIC3X_SAMPLE_RATE_SEL_REG, data);
snd_soc_component_write(component, AIC3X_SAMPLE_RATE_SEL_REG, data);
if (bypass_pll)
return 0;
@ -1172,13 +1172,13 @@ static int aic3x_hw_params(struct snd_pcm_substream *substream,
}
found:
snd_soc_update_bits(codec, AIC3X_PLL_PROGA_REG, PLLP_MASK, pll_p);
snd_soc_write(codec, AIC3X_OVRF_STATUS_AND_PLLR_REG,
snd_soc_component_update_bits(component, AIC3X_PLL_PROGA_REG, PLLP_MASK, pll_p);
snd_soc_component_write(component, AIC3X_OVRF_STATUS_AND_PLLR_REG,
pll_r << PLLR_SHIFT);
snd_soc_write(codec, AIC3X_PLL_PROGB_REG, pll_j << PLLJ_SHIFT);
snd_soc_write(codec, AIC3X_PLL_PROGC_REG,
snd_soc_component_write(component, AIC3X_PLL_PROGB_REG, pll_j << PLLJ_SHIFT);
snd_soc_component_write(component, AIC3X_PLL_PROGC_REG,
(pll_d >> 6) << PLLD_MSB_SHIFT);
snd_soc_write(codec, AIC3X_PLL_PROGD_REG,
snd_soc_component_write(component, AIC3X_PLL_PROGD_REG,
(pll_d & 0x3F) << PLLD_LSB_SHIFT);
return 0;
@ -1187,8 +1187,8 @@ static int aic3x_hw_params(struct snd_pcm_substream *substream,
static int aic3x_prepare(struct snd_pcm_substream *substream,
struct snd_soc_dai *dai)
{
struct snd_soc_codec *codec = dai->codec;
struct aic3x_priv *aic3x = snd_soc_codec_get_drvdata(codec);
struct snd_soc_component *component = dai->component;
struct aic3x_priv *aic3x = snd_soc_component_get_drvdata(component);
int delay = 0;
int width = aic3x->slot_width;
@ -1202,23 +1202,23 @@ static int aic3x_prepare(struct snd_pcm_substream *substream,
delay += aic3x->tdm_delay*width;
/* Configure data delay */
snd_soc_write(codec, AIC3X_ASD_INTF_CTRLC, delay);
snd_soc_component_write(component, AIC3X_ASD_INTF_CTRLC, delay);
return 0;
}
static int aic3x_mute(struct snd_soc_dai *dai, int mute)
{
struct snd_soc_codec *codec = dai->codec;
u8 ldac_reg = snd_soc_read(codec, LDAC_VOL) & ~MUTE_ON;
u8 rdac_reg = snd_soc_read(codec, RDAC_VOL) & ~MUTE_ON;
struct snd_soc_component *component = dai->component;
u8 ldac_reg = snd_soc_component_read32(component, LDAC_VOL) & ~MUTE_ON;
u8 rdac_reg = snd_soc_component_read32(component, RDAC_VOL) & ~MUTE_ON;
if (mute) {
snd_soc_write(codec, LDAC_VOL, ldac_reg | MUTE_ON);
snd_soc_write(codec, RDAC_VOL, rdac_reg | MUTE_ON);
snd_soc_component_write(component, LDAC_VOL, ldac_reg | MUTE_ON);
snd_soc_component_write(component, RDAC_VOL, rdac_reg | MUTE_ON);
} else {
snd_soc_write(codec, LDAC_VOL, ldac_reg);
snd_soc_write(codec, RDAC_VOL, rdac_reg);
snd_soc_component_write(component, LDAC_VOL, ldac_reg);
snd_soc_component_write(component, RDAC_VOL, rdac_reg);
}
return 0;
@ -1227,13 +1227,13 @@ static int aic3x_mute(struct snd_soc_dai *dai, int mute)
static int aic3x_set_dai_sysclk(struct snd_soc_dai *codec_dai,
int clk_id, unsigned int freq, int dir)
{
struct snd_soc_codec *codec = codec_dai->codec;
struct aic3x_priv *aic3x = snd_soc_codec_get_drvdata(codec);
struct snd_soc_component *component = codec_dai->component;
struct aic3x_priv *aic3x = snd_soc_component_get_drvdata(component);
/* set clock on MCLK or GPIO2 or BCLK */
snd_soc_update_bits(codec, AIC3X_CLKGEN_CTRL_REG, PLLCLK_IN_MASK,
snd_soc_component_update_bits(component, AIC3X_CLKGEN_CTRL_REG, PLLCLK_IN_MASK,
clk_id << PLLCLK_IN_SHIFT);
snd_soc_update_bits(codec, AIC3X_CLKGEN_CTRL_REG, CLKDIV_IN_MASK,
snd_soc_component_update_bits(component, AIC3X_CLKGEN_CTRL_REG, CLKDIV_IN_MASK,
clk_id << CLKDIV_IN_SHIFT);
aic3x->sysclk = freq;
@ -1243,12 +1243,12 @@ static int aic3x_set_dai_sysclk(struct snd_soc_dai *codec_dai,
static int aic3x_set_dai_fmt(struct snd_soc_dai *codec_dai,
unsigned int fmt)
{
struct snd_soc_codec *codec = codec_dai->codec;
struct aic3x_priv *aic3x = snd_soc_codec_get_drvdata(codec);
struct snd_soc_component *component = codec_dai->component;
struct aic3x_priv *aic3x = snd_soc_component_get_drvdata(component);
u8 iface_areg, iface_breg;
iface_areg = snd_soc_read(codec, AIC3X_ASD_INTF_CTRLA) & 0x3f;
iface_breg = snd_soc_read(codec, AIC3X_ASD_INTF_CTRLB) & 0x3f;
iface_areg = snd_soc_component_read32(component, AIC3X_ASD_INTF_CTRLA) & 0x3f;
iface_breg = snd_soc_component_read32(component, AIC3X_ASD_INTF_CTRLB) & 0x3f;
/* set master/slave audio interface */
switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
@ -1289,8 +1289,8 @@ static int aic3x_set_dai_fmt(struct snd_soc_dai *codec_dai,
aic3x->dai_fmt = fmt & SND_SOC_DAIFMT_FORMAT_MASK;
/* set iface */
snd_soc_write(codec, AIC3X_ASD_INTF_CTRLA, iface_areg);
snd_soc_write(codec, AIC3X_ASD_INTF_CTRLB, iface_breg);
snd_soc_component_write(component, AIC3X_ASD_INTF_CTRLA, iface_areg);
snd_soc_component_write(component, AIC3X_ASD_INTF_CTRLB, iface_breg);
return 0;
}
@ -1299,24 +1299,24 @@ static int aic3x_set_dai_tdm_slot(struct snd_soc_dai *codec_dai,
unsigned int tx_mask, unsigned int rx_mask,
int slots, int slot_width)
{
struct snd_soc_codec *codec = codec_dai->codec;
struct aic3x_priv *aic3x = snd_soc_codec_get_drvdata(codec);
struct snd_soc_component *component = codec_dai->component;
struct aic3x_priv *aic3x = snd_soc_component_get_drvdata(component);
unsigned int lsb;
if (tx_mask != rx_mask) {
dev_err(codec->dev, "tx and rx masks must be symmetric\n");
dev_err(component->dev, "tx and rx masks must be symmetric\n");
return -EINVAL;
}
if (unlikely(!tx_mask)) {
dev_err(codec->dev, "tx and rx masks need to be non 0\n");
dev_err(component->dev, "tx and rx masks need to be non 0\n");
return -EINVAL;
}
/* TDM based on DSP mode requires slots to be adjacent */
lsb = __ffs(tx_mask);
if ((lsb + 1) != __fls(tx_mask)) {
dev_err(codec->dev, "Invalid mask, slots must be adjacent\n");
dev_err(component->dev, "Invalid mask, slots must be adjacent\n");
return -EINVAL;
}
@ -1327,7 +1327,7 @@ static int aic3x_set_dai_tdm_slot(struct snd_soc_dai *codec_dai,
case 32:
break;
default:
dev_err(codec->dev, "Unsupported slot width %d\n", slot_width);
dev_err(component->dev, "Unsupported slot width %d\n", slot_width);
return -EINVAL;
}
@ -1336,7 +1336,7 @@ static int aic3x_set_dai_tdm_slot(struct snd_soc_dai *codec_dai,
aic3x->slot_width = slot_width;
/* DOUT in high-impedance on inactive bit clocks */
snd_soc_update_bits(codec, AIC3X_ASD_INTF_CTRLA,
snd_soc_component_update_bits(component, AIC3X_ASD_INTF_CTRLA,
DOUT_TRISTATE, DOUT_TRISTATE);
return 0;
@ -1362,9 +1362,9 @@ static int aic3x_regulator_event(struct notifier_block *nb,
return 0;
}
static int aic3x_set_power(struct snd_soc_codec *codec, int power)
static int aic3x_set_power(struct snd_soc_component *component, int power)
{
struct aic3x_priv *aic3x = snd_soc_codec_get_drvdata(codec);
struct aic3x_priv *aic3x = snd_soc_component_get_drvdata(component);
unsigned int pll_c, pll_d;
int ret;
@ -1388,12 +1388,12 @@ static int aic3x_set_power(struct snd_soc_codec *codec, int power)
* writing one of them and thus caused other one also not
* being written
*/
pll_c = snd_soc_read(codec, AIC3X_PLL_PROGC_REG);
pll_d = snd_soc_read(codec, AIC3X_PLL_PROGD_REG);
pll_c = snd_soc_component_read32(component, AIC3X_PLL_PROGC_REG);
pll_d = snd_soc_component_read32(component, AIC3X_PLL_PROGD_REG);
if (pll_c == aic3x_reg[AIC3X_PLL_PROGC_REG].def ||
pll_d == aic3x_reg[AIC3X_PLL_PROGD_REG].def) {
snd_soc_write(codec, AIC3X_PLL_PROGC_REG, pll_c);
snd_soc_write(codec, AIC3X_PLL_PROGD_REG, pll_d);
snd_soc_component_write(component, AIC3X_PLL_PROGC_REG, pll_c);
snd_soc_component_write(component, AIC3X_PLL_PROGD_REG, pll_d);
}
/*
@ -1407,7 +1407,7 @@ static int aic3x_set_power(struct snd_soc_codec *codec, int power)
* possible VDD leakage currents in case the supply regulators
* remain on
*/
snd_soc_write(codec, AIC3X_RESET, SOFT_RESET);
snd_soc_component_write(component, AIC3X_RESET, SOFT_RESET);
regcache_mark_dirty(aic3x->regmap);
aic3x->power = 0;
/* HW writes are needless when bias is off */
@ -1419,35 +1419,35 @@ static int aic3x_set_power(struct snd_soc_codec *codec, int power)
return ret;
}
static int aic3x_set_bias_level(struct snd_soc_codec *codec,
static int aic3x_set_bias_level(struct snd_soc_component *component,
enum snd_soc_bias_level level)
{
struct aic3x_priv *aic3x = snd_soc_codec_get_drvdata(codec);
struct aic3x_priv *aic3x = snd_soc_component_get_drvdata(component);
switch (level) {
case SND_SOC_BIAS_ON:
break;
case SND_SOC_BIAS_PREPARE:
if (snd_soc_codec_get_bias_level(codec) == SND_SOC_BIAS_STANDBY &&
if (snd_soc_component_get_bias_level(component) == SND_SOC_BIAS_STANDBY &&
aic3x->master) {
/* enable pll */
snd_soc_update_bits(codec, AIC3X_PLL_PROGA_REG,
snd_soc_component_update_bits(component, AIC3X_PLL_PROGA_REG,
PLL_ENABLE, PLL_ENABLE);
}
break;
case SND_SOC_BIAS_STANDBY:
if (!aic3x->power)
aic3x_set_power(codec, 1);
if (snd_soc_codec_get_bias_level(codec) == SND_SOC_BIAS_PREPARE &&
aic3x_set_power(component, 1);
if (snd_soc_component_get_bias_level(component) == SND_SOC_BIAS_PREPARE &&
aic3x->master) {
/* disable pll */
snd_soc_update_bits(codec, AIC3X_PLL_PROGA_REG,
snd_soc_component_update_bits(component, AIC3X_PLL_PROGA_REG,
PLL_ENABLE, 0);
}
break;
case SND_SOC_BIAS_OFF:
if (aic3x->power)
aic3x_set_power(codec, 0);
aic3x_set_power(component, 0);
break;
}
@ -1486,96 +1486,96 @@ static struct snd_soc_dai_driver aic3x_dai = {
.symmetric_rates = 1,
};
static void aic3x_mono_init(struct snd_soc_codec *codec)
static void aic3x_mono_init(struct snd_soc_component *component)
{
/* DAC to Mono Line Out default volume and route to Output mixer */
snd_soc_write(codec, DACL1_2_MONOLOPM_VOL, DEFAULT_VOL | ROUTE_ON);
snd_soc_write(codec, DACR1_2_MONOLOPM_VOL, DEFAULT_VOL | ROUTE_ON);
snd_soc_component_write(component, DACL1_2_MONOLOPM_VOL, DEFAULT_VOL | ROUTE_ON);
snd_soc_component_write(component, DACR1_2_MONOLOPM_VOL, DEFAULT_VOL | ROUTE_ON);
/* unmute all outputs */
snd_soc_update_bits(codec, MONOLOPM_CTRL, UNMUTE, UNMUTE);
snd_soc_component_update_bits(component, MONOLOPM_CTRL, UNMUTE, UNMUTE);
/* PGA to Mono Line Out default volume, disconnect from Output Mixer */
snd_soc_write(codec, PGAL_2_MONOLOPM_VOL, DEFAULT_VOL);
snd_soc_write(codec, PGAR_2_MONOLOPM_VOL, DEFAULT_VOL);
snd_soc_component_write(component, PGAL_2_MONOLOPM_VOL, DEFAULT_VOL);
snd_soc_component_write(component, PGAR_2_MONOLOPM_VOL, DEFAULT_VOL);
/* Line2 to Mono Out default volume, disconnect from Output Mixer */
snd_soc_write(codec, LINE2L_2_MONOLOPM_VOL, DEFAULT_VOL);
snd_soc_write(codec, LINE2R_2_MONOLOPM_VOL, DEFAULT_VOL);
snd_soc_component_write(component, LINE2L_2_MONOLOPM_VOL, DEFAULT_VOL);
snd_soc_component_write(component, LINE2R_2_MONOLOPM_VOL, DEFAULT_VOL);
}
/*
* initialise the AIC3X driver
* register the mixer and dsp interfaces with the kernel
*/
static int aic3x_init(struct snd_soc_codec *codec)
static int aic3x_init(struct snd_soc_component *component)
{
struct aic3x_priv *aic3x = snd_soc_codec_get_drvdata(codec);
struct aic3x_priv *aic3x = snd_soc_component_get_drvdata(component);
snd_soc_write(codec, AIC3X_PAGE_SELECT, PAGE0_SELECT);
snd_soc_write(codec, AIC3X_RESET, SOFT_RESET);
snd_soc_component_write(component, AIC3X_PAGE_SELECT, PAGE0_SELECT);
snd_soc_component_write(component, AIC3X_RESET, SOFT_RESET);
/* DAC default volume and mute */
snd_soc_write(codec, LDAC_VOL, DEFAULT_VOL | MUTE_ON);
snd_soc_write(codec, RDAC_VOL, DEFAULT_VOL | MUTE_ON);
snd_soc_component_write(component, LDAC_VOL, DEFAULT_VOL | MUTE_ON);
snd_soc_component_write(component, RDAC_VOL, DEFAULT_VOL | MUTE_ON);
/* DAC to HP default volume and route to Output mixer */
snd_soc_write(codec, DACL1_2_HPLOUT_VOL, DEFAULT_VOL | ROUTE_ON);
snd_soc_write(codec, DACR1_2_HPROUT_VOL, DEFAULT_VOL | ROUTE_ON);
snd_soc_write(codec, DACL1_2_HPLCOM_VOL, DEFAULT_VOL | ROUTE_ON);
snd_soc_write(codec, DACR1_2_HPRCOM_VOL, DEFAULT_VOL | ROUTE_ON);
snd_soc_component_write(component, DACL1_2_HPLOUT_VOL, DEFAULT_VOL | ROUTE_ON);
snd_soc_component_write(component, DACR1_2_HPROUT_VOL, DEFAULT_VOL | ROUTE_ON);
snd_soc_component_write(component, DACL1_2_HPLCOM_VOL, DEFAULT_VOL | ROUTE_ON);
snd_soc_component_write(component, DACR1_2_HPRCOM_VOL, DEFAULT_VOL | ROUTE_ON);
/* DAC to Line Out default volume and route to Output mixer */
snd_soc_write(codec, DACL1_2_LLOPM_VOL, DEFAULT_VOL | ROUTE_ON);
snd_soc_write(codec, DACR1_2_RLOPM_VOL, DEFAULT_VOL | ROUTE_ON);
snd_soc_component_write(component, DACL1_2_LLOPM_VOL, DEFAULT_VOL | ROUTE_ON);
snd_soc_component_write(component, DACR1_2_RLOPM_VOL, DEFAULT_VOL | ROUTE_ON);
/* unmute all outputs */
snd_soc_update_bits(codec, LLOPM_CTRL, UNMUTE, UNMUTE);
snd_soc_update_bits(codec, RLOPM_CTRL, UNMUTE, UNMUTE);
snd_soc_update_bits(codec, HPLOUT_CTRL, UNMUTE, UNMUTE);
snd_soc_update_bits(codec, HPROUT_CTRL, UNMUTE, UNMUTE);
snd_soc_update_bits(codec, HPLCOM_CTRL, UNMUTE, UNMUTE);
snd_soc_update_bits(codec, HPRCOM_CTRL, UNMUTE, UNMUTE);
snd_soc_component_update_bits(component, LLOPM_CTRL, UNMUTE, UNMUTE);
snd_soc_component_update_bits(component, RLOPM_CTRL, UNMUTE, UNMUTE);
snd_soc_component_update_bits(component, HPLOUT_CTRL, UNMUTE, UNMUTE);
snd_soc_component_update_bits(component, HPROUT_CTRL, UNMUTE, UNMUTE);
snd_soc_component_update_bits(component, HPLCOM_CTRL, UNMUTE, UNMUTE);
snd_soc_component_update_bits(component, HPRCOM_CTRL, UNMUTE, UNMUTE);
/* ADC default volume and unmute */
snd_soc_write(codec, LADC_VOL, DEFAULT_GAIN);
snd_soc_write(codec, RADC_VOL, DEFAULT_GAIN);
snd_soc_component_write(component, LADC_VOL, DEFAULT_GAIN);
snd_soc_component_write(component, RADC_VOL, DEFAULT_GAIN);
/* By default route Line1 to ADC PGA mixer */
snd_soc_write(codec, LINE1L_2_LADC_CTRL, 0x0);
snd_soc_write(codec, LINE1R_2_RADC_CTRL, 0x0);
snd_soc_component_write(component, LINE1L_2_LADC_CTRL, 0x0);
snd_soc_component_write(component, LINE1R_2_RADC_CTRL, 0x0);
/* PGA to HP Bypass default volume, disconnect from Output Mixer */
snd_soc_write(codec, PGAL_2_HPLOUT_VOL, DEFAULT_VOL);
snd_soc_write(codec, PGAR_2_HPROUT_VOL, DEFAULT_VOL);
snd_soc_write(codec, PGAL_2_HPLCOM_VOL, DEFAULT_VOL);
snd_soc_write(codec, PGAR_2_HPRCOM_VOL, DEFAULT_VOL);
snd_soc_component_write(component, PGAL_2_HPLOUT_VOL, DEFAULT_VOL);
snd_soc_component_write(component, PGAR_2_HPROUT_VOL, DEFAULT_VOL);
snd_soc_component_write(component, PGAL_2_HPLCOM_VOL, DEFAULT_VOL);
snd_soc_component_write(component, PGAR_2_HPRCOM_VOL, DEFAULT_VOL);
/* PGA to Line Out default volume, disconnect from Output Mixer */
snd_soc_write(codec, PGAL_2_LLOPM_VOL, DEFAULT_VOL);
snd_soc_write(codec, PGAR_2_RLOPM_VOL, DEFAULT_VOL);
snd_soc_component_write(component, PGAL_2_LLOPM_VOL, DEFAULT_VOL);
snd_soc_component_write(component, PGAR_2_RLOPM_VOL, DEFAULT_VOL);
/* On tlv320aic3104, these registers are reserved and must not be written */
if (aic3x->model != AIC3X_MODEL_3104) {
/* Line2 to HP Bypass default volume, disconnect from Output Mixer */
snd_soc_write(codec, LINE2L_2_HPLOUT_VOL, DEFAULT_VOL);
snd_soc_write(codec, LINE2R_2_HPROUT_VOL, DEFAULT_VOL);
snd_soc_write(codec, LINE2L_2_HPLCOM_VOL, DEFAULT_VOL);
snd_soc_write(codec, LINE2R_2_HPRCOM_VOL, DEFAULT_VOL);
snd_soc_component_write(component, LINE2L_2_HPLOUT_VOL, DEFAULT_VOL);
snd_soc_component_write(component, LINE2R_2_HPROUT_VOL, DEFAULT_VOL);
snd_soc_component_write(component, LINE2L_2_HPLCOM_VOL, DEFAULT_VOL);
snd_soc_component_write(component, LINE2R_2_HPRCOM_VOL, DEFAULT_VOL);
/* Line2 Line Out default volume, disconnect from Output Mixer */
snd_soc_write(codec, LINE2L_2_LLOPM_VOL, DEFAULT_VOL);
snd_soc_write(codec, LINE2R_2_RLOPM_VOL, DEFAULT_VOL);
snd_soc_component_write(component, LINE2L_2_LLOPM_VOL, DEFAULT_VOL);
snd_soc_component_write(component, LINE2R_2_RLOPM_VOL, DEFAULT_VOL);
}
switch (aic3x->model) {
case AIC3X_MODEL_3X:
case AIC3X_MODEL_33:
aic3x_mono_init(codec);
aic3x_mono_init(component);
break;
case AIC3X_MODEL_3007:
snd_soc_write(codec, CLASSD_CTRL, 0);
snd_soc_component_write(component, CLASSD_CTRL, 0);
break;
}
/* Output common-mode voltage = 1.5 V */
snd_soc_update_bits(codec, HPOUT_SC, HPOUT_SC_OCMV_MASK,
snd_soc_component_update_bits(component, HPOUT_SC, HPOUT_SC_OCMV_MASK,
aic3x->ocmv << HPOUT_SC_OCMV_SHIFT);
return 0;
@ -1594,13 +1594,13 @@ static bool aic3x_is_shared_reset(struct aic3x_priv *aic3x)
return false;
}
static int aic3x_probe(struct snd_soc_codec *codec)
static int aic3x_probe(struct snd_soc_component *component)
{
struct aic3x_priv *aic3x = snd_soc_codec_get_drvdata(codec);
struct aic3x_priv *aic3x = snd_soc_component_get_drvdata(component);
int ret, i;
INIT_LIST_HEAD(&aic3x->list);
aic3x->codec = codec;
aic3x->component = component;
for (i = 0; i < ARRAY_SIZE(aic3x->supplies); i++) {
aic3x->disable_nb[i].nb.notifier_call = aic3x_regulator_event;
@ -1608,7 +1608,7 @@ static int aic3x_probe(struct snd_soc_codec *codec)
ret = regulator_register_notifier(aic3x->supplies[i].consumer,
&aic3x->disable_nb[i].nb);
if (ret) {
dev_err(codec->dev,
dev_err(component->dev,
"Failed to request regulator notifier: %d\n",
ret);
goto err_notif;
@ -1616,32 +1616,32 @@ static int aic3x_probe(struct snd_soc_codec *codec)
}
regcache_mark_dirty(aic3x->regmap);
aic3x_init(codec);
aic3x_init(component);
if (aic3x->setup) {
if (aic3x->model != AIC3X_MODEL_3104) {
/* setup GPIO functions */
snd_soc_write(codec, AIC3X_GPIO1_REG,
snd_soc_component_write(component, AIC3X_GPIO1_REG,
(aic3x->setup->gpio_func[0] & 0xf) << 4);
snd_soc_write(codec, AIC3X_GPIO2_REG,
snd_soc_component_write(component, AIC3X_GPIO2_REG,
(aic3x->setup->gpio_func[1] & 0xf) << 4);
} else {
dev_warn(codec->dev, "GPIO functionality is not supported on tlv320aic3104\n");
dev_warn(component->dev, "GPIO functionality is not supported on tlv320aic3104\n");
}
}
switch (aic3x->model) {
case AIC3X_MODEL_3X:
case AIC3X_MODEL_33:
snd_soc_add_codec_controls(codec, aic3x_extra_snd_controls,
snd_soc_add_component_controls(component, aic3x_extra_snd_controls,
ARRAY_SIZE(aic3x_extra_snd_controls));
snd_soc_add_codec_controls(codec, aic3x_mono_controls,
snd_soc_add_component_controls(component, aic3x_mono_controls,
ARRAY_SIZE(aic3x_mono_controls));
break;
case AIC3X_MODEL_3007:
snd_soc_add_codec_controls(codec, aic3x_extra_snd_controls,
snd_soc_add_component_controls(component, aic3x_extra_snd_controls,
ARRAY_SIZE(aic3x_extra_snd_controls));
snd_soc_add_codec_controls(codec,
snd_soc_add_component_controls(component,
&aic3x_classd_amp_gain_ctrl, 1);
break;
case AIC3X_MODEL_3104:
@ -1653,7 +1653,7 @@ static int aic3x_probe(struct snd_soc_codec *codec)
case AIC3X_MICBIAS_2_0V:
case AIC3X_MICBIAS_2_5V:
case AIC3X_MICBIAS_AVDDV:
snd_soc_update_bits(codec, MICBIAS_CTRL,
snd_soc_component_update_bits(component, MICBIAS_CTRL,
MICBIAS_LEVEL_MASK,
(aic3x->micbias_vg) << MICBIAS_LEVEL_SHIFT);
break;
@ -1666,7 +1666,7 @@ static int aic3x_probe(struct snd_soc_codec *codec)
break;
}
aic3x_add_widgets(codec);
aic3x_add_widgets(component);
return 0;
@ -1677,32 +1677,30 @@ static int aic3x_probe(struct snd_soc_codec *codec)
return ret;
}
static int aic3x_remove(struct snd_soc_codec *codec)
static void aic3x_remove(struct snd_soc_component *component)
{
struct aic3x_priv *aic3x = snd_soc_codec_get_drvdata(codec);
struct aic3x_priv *aic3x = snd_soc_component_get_drvdata(component);
int i;
list_del(&aic3x->list);
for (i = 0; i < ARRAY_SIZE(aic3x->supplies); i++)
regulator_unregister_notifier(aic3x->supplies[i].consumer,
&aic3x->disable_nb[i].nb);
return 0;
}
static const struct snd_soc_codec_driver soc_codec_dev_aic3x = {
.set_bias_level = aic3x_set_bias_level,
.idle_bias_off = true,
.probe = aic3x_probe,
.remove = aic3x_remove,
.component_driver = {
.controls = aic3x_snd_controls,
.num_controls = ARRAY_SIZE(aic3x_snd_controls),
.dapm_widgets = aic3x_dapm_widgets,
.num_dapm_widgets = ARRAY_SIZE(aic3x_dapm_widgets),
.dapm_routes = intercon,
.num_dapm_routes = ARRAY_SIZE(intercon),
},
static const struct snd_soc_component_driver soc_component_dev_aic3x = {
.set_bias_level = aic3x_set_bias_level,
.probe = aic3x_probe,
.remove = aic3x_remove,
.controls = aic3x_snd_controls,
.num_controls = ARRAY_SIZE(aic3x_snd_controls),
.dapm_widgets = aic3x_dapm_widgets,
.num_dapm_widgets = ARRAY_SIZE(aic3x_dapm_widgets),
.dapm_routes = intercon,
.num_dapm_routes = ARRAY_SIZE(intercon),
.use_pmdown_time = 1,
.endianness = 1,
.non_legacy_dai_naming = 1,
};
static void aic3x_configure_ocmv(struct i2c_client *client)
@ -1876,8 +1874,8 @@ static int aic3x_i2c_probe(struct i2c_client *i2c,
ret);
}
ret = snd_soc_register_codec(&i2c->dev,
&soc_codec_dev_aic3x, &aic3x_dai, 1);
ret = devm_snd_soc_register_component(&i2c->dev,
&soc_component_dev_aic3x, &aic3x_dai, 1);
if (ret != 0)
goto err_gpio;
@ -1898,7 +1896,6 @@ static int aic3x_i2c_remove(struct i2c_client *client)
{
struct aic3x_priv *aic3x = i2c_get_clientdata(client);
snd_soc_unregister_codec(&client->dev);
if (gpio_is_valid(aic3x->gpio_reset) &&
!aic3x_is_shared_reset(aic3x)) {
gpio_set_value(aic3x->gpio_reset, 0);

396
sound/soc/codecs/tlv320dac33.c
View File

@ -63,9 +63,9 @@
(((samples)*5000) / (((burstrate)*5000) / ((burstrate) - (playrate))))
static void dac33_calculate_times(struct snd_pcm_substream *substream,
struct snd_soc_codec *codec);
struct snd_soc_component *component);
static int dac33_prepare_chip(struct snd_pcm_substream *substream,
struct snd_soc_codec *codec);
struct snd_soc_component *component);
enum dac33_state {
DAC33_IDLE = 0,
@ -91,7 +91,7 @@ static const char *dac33_supply_names[DAC33_NUM_SUPPLIES] = {
struct tlv320dac33_priv {
struct mutex mutex;
struct work_struct work;
struct snd_soc_codec *codec;
struct snd_soc_component *component;
struct regulator_bulk_data supplies[DAC33_NUM_SUPPLIES];
struct snd_pcm_substream *substream;
int power_gpio;
@ -171,10 +171,10 @@ static const u8 dac33_reg[DAC33_CACHEREGNUM] = {
};
/* Register read and write */
static inline unsigned int dac33_read_reg_cache(struct snd_soc_codec *codec,
static inline unsigned int dac33_read_reg_cache(struct snd_soc_component *component,
unsigned reg)
{
struct tlv320dac33_priv *dac33 = snd_soc_codec_get_drvdata(codec);
struct tlv320dac33_priv *dac33 = snd_soc_component_get_drvdata(component);
u8 *cache = dac33->reg_cache;
if (reg >= DAC33_CACHEREGNUM)
return 0;
@ -182,10 +182,10 @@ static inline unsigned int dac33_read_reg_cache(struct snd_soc_codec *codec,
return cache[reg];
}
static inline void dac33_write_reg_cache(struct snd_soc_codec *codec,
static inline void dac33_write_reg_cache(struct snd_soc_component *component,
u8 reg, u8 value)
{
struct tlv320dac33_priv *dac33 = snd_soc_codec_get_drvdata(codec);
struct tlv320dac33_priv *dac33 = snd_soc_component_get_drvdata(component);
u8 *cache = dac33->reg_cache;
if (reg >= DAC33_CACHEREGNUM)
return;
@ -193,10 +193,10 @@ static inline void dac33_write_reg_cache(struct snd_soc_codec *codec,
cache[reg] = value;
}
static int dac33_read(struct snd_soc_codec *codec, unsigned int reg,
static int dac33_read(struct snd_soc_component *component, unsigned int reg,
u8 *value)
{
struct tlv320dac33_priv *dac33 = snd_soc_codec_get_drvdata(codec);
struct tlv320dac33_priv *dac33 = snd_soc_component_get_drvdata(component);
int val, ret = 0;
*value = reg & 0xff;
@ -205,24 +205,24 @@ static int dac33_read(struct snd_soc_codec *codec, unsigned int reg,
if (dac33->chip_power) {
val = i2c_smbus_read_byte_data(dac33->i2c, value[0]);
if (val < 0) {
dev_err(codec->dev, "Read failed (%d)\n", val);
value[0] = dac33_read_reg_cache(codec, reg);
dev_err(component->dev, "Read failed (%d)\n", val);
value[0] = dac33_read_reg_cache(component, reg);
ret = val;
} else {
value[0] = val;
dac33_write_reg_cache(codec, reg, val);
dac33_write_reg_cache(component, reg, val);
}
} else {
value[0] = dac33_read_reg_cache(codec, reg);
value[0] = dac33_read_reg_cache(component, reg);
}
return ret;
}
static int dac33_write(struct snd_soc_codec *codec, unsigned int reg,
static int dac33_write(struct snd_soc_component *component, unsigned int reg,
unsigned int value)
{
struct tlv320dac33_priv *dac33 = snd_soc_codec_get_drvdata(codec);
struct tlv320dac33_priv *dac33 = snd_soc_component_get_drvdata(component);
u8 data[2];
int ret = 0;
@ -234,11 +234,11 @@ static int dac33_write(struct snd_soc_codec *codec, unsigned int reg,
data[0] = reg & 0xff;
data[1] = value & 0xff;
dac33_write_reg_cache(codec, data[0], data[1]);
dac33_write_reg_cache(component, data[0], data[1]);
if (dac33->chip_power) {
ret = i2c_master_send(dac33->i2c, data, 2);
if (ret != 2)
dev_err(codec->dev, "Write failed (%d)\n", ret);
dev_err(component->dev, "Write failed (%d)\n", ret);
else
ret = 0;
}
@ -246,24 +246,24 @@ static int dac33_write(struct snd_soc_codec *codec, unsigned int reg,
return ret;
}
static int dac33_write_locked(struct snd_soc_codec *codec, unsigned int reg,
static int dac33_write_locked(struct snd_soc_component *component, unsigned int reg,
unsigned int value)
{
struct tlv320dac33_priv *dac33 = snd_soc_codec_get_drvdata(codec);
struct tlv320dac33_priv *dac33 = snd_soc_component_get_drvdata(component);
int ret;
mutex_lock(&dac33->mutex);
ret = dac33_write(codec, reg, value);
ret = dac33_write(component, reg, value);
mutex_unlock(&dac33->mutex);
return ret;
}
#define DAC33_I2C_ADDR_AUTOINC 0x80
static int dac33_write16(struct snd_soc_codec *codec, unsigned int reg,
static int dac33_write16(struct snd_soc_component *component, unsigned int reg,
unsigned int value)
{
struct tlv320dac33_priv *dac33 = snd_soc_codec_get_drvdata(codec);
struct tlv320dac33_priv *dac33 = snd_soc_component_get_drvdata(component);
u8 data[3];
int ret = 0;
@ -277,15 +277,15 @@ static int dac33_write16(struct snd_soc_codec *codec, unsigned int reg,
data[1] = (value >> 8) & 0xff;
data[2] = value & 0xff;
dac33_write_reg_cache(codec, data[0], data[1]);
dac33_write_reg_cache(codec, data[0] + 1, data[2]);
dac33_write_reg_cache(component, data[0], data[1]);
dac33_write_reg_cache(component, data[0] + 1, data[2]);
if (dac33->chip_power) {
/* We need to set autoincrement mode for 16 bit writes */
data[0] |= DAC33_I2C_ADDR_AUTOINC;
ret = i2c_master_send(dac33->i2c, data, 3);
if (ret != 3)
dev_err(codec->dev, "Write failed (%d)\n", ret);
dev_err(component->dev, "Write failed (%d)\n", ret);
else
ret = 0;
}
@ -293,52 +293,52 @@ static int dac33_write16(struct snd_soc_codec *codec, unsigned int reg,
return ret;
}
static void dac33_init_chip(struct snd_soc_codec *codec)
static void dac33_init_chip(struct snd_soc_component *component)
{
struct tlv320dac33_priv *dac33 = snd_soc_codec_get_drvdata(codec);
struct tlv320dac33_priv *dac33 = snd_soc_component_get_drvdata(component);
if (unlikely(!dac33->chip_power))
return;
/* A : DAC sample rate Fsref/1.5 */
dac33_write(codec, DAC33_DAC_CTRL_A, DAC33_DACRATE(0));
dac33_write(component, DAC33_DAC_CTRL_A, DAC33_DACRATE(0));
/* B : DAC src=normal, not muted */
dac33_write(codec, DAC33_DAC_CTRL_B, DAC33_DACSRCR_RIGHT |
dac33_write(component, DAC33_DAC_CTRL_B, DAC33_DACSRCR_RIGHT |
DAC33_DACSRCL_LEFT);
/* C : (defaults) */
dac33_write(codec, DAC33_DAC_CTRL_C, 0x00);
dac33_write(component, DAC33_DAC_CTRL_C, 0x00);
/* 73 : volume soft stepping control,
clock source = internal osc (?) */
dac33_write(codec, DAC33_ANA_VOL_SOFT_STEP_CTRL, DAC33_VOLCLKEN);
dac33_write(component, DAC33_ANA_VOL_SOFT_STEP_CTRL, DAC33_VOLCLKEN);
/* Restore only selected registers (gains mostly) */
dac33_write(codec, DAC33_LDAC_DIG_VOL_CTRL,
dac33_read_reg_cache(codec, DAC33_LDAC_DIG_VOL_CTRL));
dac33_write(codec, DAC33_RDAC_DIG_VOL_CTRL,
dac33_read_reg_cache(codec, DAC33_RDAC_DIG_VOL_CTRL));
dac33_write(component, DAC33_LDAC_DIG_VOL_CTRL,
dac33_read_reg_cache(component, DAC33_LDAC_DIG_VOL_CTRL));
dac33_write(component, DAC33_RDAC_DIG_VOL_CTRL,
dac33_read_reg_cache(component, DAC33_RDAC_DIG_VOL_CTRL));
dac33_write(codec, DAC33_LINEL_TO_LLO_VOL,
dac33_read_reg_cache(codec, DAC33_LINEL_TO_LLO_VOL));
dac33_write(codec, DAC33_LINER_TO_RLO_VOL,
dac33_read_reg_cache(codec, DAC33_LINER_TO_RLO_VOL));
dac33_write(component, DAC33_LINEL_TO_LLO_VOL,
dac33_read_reg_cache(component, DAC33_LINEL_TO_LLO_VOL));
dac33_write(component, DAC33_LINER_TO_RLO_VOL,
dac33_read_reg_cache(component, DAC33_LINER_TO_RLO_VOL));
dac33_write(codec, DAC33_OUT_AMP_CTRL,
dac33_read_reg_cache(codec, DAC33_OUT_AMP_CTRL));
dac33_write(component, DAC33_OUT_AMP_CTRL,
dac33_read_reg_cache(component, DAC33_OUT_AMP_CTRL));
dac33_write(codec, DAC33_LDAC_PWR_CTRL,
dac33_read_reg_cache(codec, DAC33_LDAC_PWR_CTRL));
dac33_write(codec, DAC33_RDAC_PWR_CTRL,
dac33_read_reg_cache(codec, DAC33_RDAC_PWR_CTRL));
dac33_write(component, DAC33_LDAC_PWR_CTRL,
dac33_read_reg_cache(component, DAC33_LDAC_PWR_CTRL));
dac33_write(component, DAC33_RDAC_PWR_CTRL,
dac33_read_reg_cache(component, DAC33_RDAC_PWR_CTRL));
}
static inline int dac33_read_id(struct snd_soc_codec *codec)
static inline int dac33_read_id(struct snd_soc_component *component)
{
int i, ret = 0;
u8 reg;
for (i = 0; i < 3; i++) {
ret = dac33_read(codec, DAC33_DEVICE_ID_MSB + i, &reg);
ret = dac33_read(component, DAC33_DEVICE_ID_MSB + i, &reg);
if (ret < 0)
break;
}
@ -346,44 +346,44 @@ static inline int dac33_read_id(struct snd_soc_codec *codec)
return ret;
}
static inline void dac33_soft_power(struct snd_soc_codec *codec, int power)
static inline void dac33_soft_power(struct snd_soc_component *component, int power)
{
u8 reg;
reg = dac33_read_reg_cache(codec, DAC33_PWR_CTRL);
reg = dac33_read_reg_cache(component, DAC33_PWR_CTRL);
if (power)
reg |= DAC33_PDNALLB;
else
reg &= ~(DAC33_PDNALLB | DAC33_OSCPDNB |
DAC33_DACRPDNB | DAC33_DACLPDNB);
dac33_write(codec, DAC33_PWR_CTRL, reg);
dac33_write(component, DAC33_PWR_CTRL, reg);
}
static inline void dac33_disable_digital(struct snd_soc_codec *codec)
static inline void dac33_disable_digital(struct snd_soc_component *component)
{
u8 reg;
/* Stop the DAI clock */
reg = dac33_read_reg_cache(codec, DAC33_SER_AUDIOIF_CTRL_B);
reg = dac33_read_reg_cache(component, DAC33_SER_AUDIOIF_CTRL_B);
reg &= ~DAC33_BCLKON;
dac33_write(codec, DAC33_SER_AUDIOIF_CTRL_B, reg);
dac33_write(component, DAC33_SER_AUDIOIF_CTRL_B, reg);
/* Power down the Oscillator, and DACs */
reg = dac33_read_reg_cache(codec, DAC33_PWR_CTRL);
reg = dac33_read_reg_cache(component, DAC33_PWR_CTRL);
reg &= ~(DAC33_OSCPDNB | DAC33_DACRPDNB | DAC33_DACLPDNB);
dac33_write(codec, DAC33_PWR_CTRL, reg);
dac33_write(component, DAC33_PWR_CTRL, reg);
}
static int dac33_hard_power(struct snd_soc_codec *codec, int power)
static int dac33_hard_power(struct snd_soc_component *component, int power)
{
struct tlv320dac33_priv *dac33 = snd_soc_codec_get_drvdata(codec);
struct tlv320dac33_priv *dac33 = snd_soc_component_get_drvdata(component);
int ret = 0;
mutex_lock(&dac33->mutex);
/* Safety check */
if (unlikely(power == dac33->chip_power)) {
dev_dbg(codec->dev, "Trying to set the same power state: %s\n",
dev_dbg(component->dev, "Trying to set the same power state: %s\n",
power ? "ON" : "OFF");
goto exit;
}
@ -392,7 +392,7 @@ static int dac33_hard_power(struct snd_soc_codec *codec, int power)
ret = regulator_bulk_enable(ARRAY_SIZE(dac33->supplies),
dac33->supplies);
if (ret != 0) {
dev_err(codec->dev,
dev_err(component->dev,
"Failed to enable supplies: %d\n", ret);
goto exit;
}
@ -402,14 +402,14 @@ static int dac33_hard_power(struct snd_soc_codec *codec, int power)
dac33->chip_power = 1;
} else {
dac33_soft_power(codec, 0);
dac33_soft_power(component, 0);
if (dac33->power_gpio >= 0)
gpio_set_value(dac33->power_gpio, 0);
ret = regulator_bulk_disable(ARRAY_SIZE(dac33->supplies),
dac33->supplies);
if (ret != 0) {
dev_err(codec->dev,
dev_err(component->dev,
"Failed to disable supplies: %d\n", ret);
goto exit;
}
@ -425,18 +425,18 @@ static int dac33_hard_power(struct snd_soc_codec *codec, int power)
static int dac33_playback_event(struct snd_soc_dapm_widget *w,
struct snd_kcontrol *kcontrol, int event)
{
struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
struct tlv320dac33_priv *dac33 = snd_soc_codec_get_drvdata(codec);
struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
struct tlv320dac33_priv *dac33 = snd_soc_component_get_drvdata(component);
switch (event) {
case SND_SOC_DAPM_PRE_PMU:
if (likely(dac33->substream)) {
dac33_calculate_times(dac33->substream, codec);
dac33_prepare_chip(dac33->substream, codec);
dac33_calculate_times(dac33->substream, component);
dac33_prepare_chip(dac33->substream, component);
}
break;
case SND_SOC_DAPM_POST_PMD:
dac33_disable_digital(codec);
dac33_disable_digital(component);
break;
}
return 0;
@ -445,8 +445,8 @@ static int dac33_playback_event(struct snd_soc_dapm_widget *w,
static int dac33_get_fifo_mode(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_value *ucontrol)
{
struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
struct tlv320dac33_priv *dac33 = snd_soc_codec_get_drvdata(codec);
struct snd_soc_component *component = snd_soc_kcontrol_component(kcontrol);
struct tlv320dac33_priv *dac33 = snd_soc_component_get_drvdata(component);
ucontrol->value.enumerated.item[0] = dac33->fifo_mode;
@ -456,14 +456,14 @@ static int dac33_get_fifo_mode(struct snd_kcontrol *kcontrol,
static int dac33_set_fifo_mode(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_value *ucontrol)
{
struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
struct tlv320dac33_priv *dac33 = snd_soc_codec_get_drvdata(codec);
struct snd_soc_component *component = snd_soc_kcontrol_component(kcontrol);
struct tlv320dac33_priv *dac33 = snd_soc_component_get_drvdata(component);
int ret = 0;
if (dac33->fifo_mode == ucontrol->value.enumerated.item[0])
return 0;
/* Do not allow changes while stream is running*/
if (snd_soc_codec_is_active(codec))
if (snd_soc_component_is_active(component))
return -EPERM;
if (ucontrol->value.enumerated.item[0] >= DAC33_FIFO_LAST_MODE)
@ -623,7 +623,7 @@ static const struct snd_soc_dapm_route audio_map[] = {
{"RIGHT_LO", NULL, "Codec Power"},
};
static int dac33_set_bias_level(struct snd_soc_codec *codec,
static int dac33_set_bias_level(struct snd_soc_component *component,
enum snd_soc_bias_level level)
{
int ret;
@ -634,20 +634,20 @@ static int dac33_set_bias_level(struct snd_soc_codec *codec,
case SND_SOC_BIAS_PREPARE:
break;
case SND_SOC_BIAS_STANDBY:
if (snd_soc_codec_get_bias_level(codec) == SND_SOC_BIAS_OFF) {
/* Coming from OFF, switch on the codec */
ret = dac33_hard_power(codec, 1);
if (snd_soc_component_get_bias_level(component) == SND_SOC_BIAS_OFF) {
/* Coming from OFF, switch on the component */
ret = dac33_hard_power(component, 1);
if (ret != 0)
return ret;
dac33_init_chip(codec);
dac33_init_chip(component);
}
break;
case SND_SOC_BIAS_OFF:
/* Do not power off, when the codec is already off */
if (snd_soc_codec_get_bias_level(codec) == SND_SOC_BIAS_OFF)
/* Do not power off, when the component is already off */
if (snd_soc_component_get_bias_level(component) == SND_SOC_BIAS_OFF)
return 0;
ret = dac33_hard_power(codec, 0);
ret = dac33_hard_power(component, 0);
if (ret != 0)
return ret;
break;
@ -658,13 +658,13 @@ static int dac33_set_bias_level(struct snd_soc_codec *codec,
static inline void dac33_prefill_handler(struct tlv320dac33_priv *dac33)
{
struct snd_soc_codec *codec = dac33->codec;
struct snd_soc_component *component = dac33->component;
unsigned int delay;
unsigned long flags;
switch (dac33->fifo_mode) {
case DAC33_FIFO_MODE1:
dac33_write16(codec, DAC33_NSAMPLE_MSB,
dac33_write16(component, DAC33_NSAMPLE_MSB,
DAC33_THRREG(dac33->nsample));
/* Take the timestamps */
@ -673,13 +673,13 @@ static inline void dac33_prefill_handler(struct tlv320dac33_priv *dac33)
dac33->t_stamp1 = dac33->t_stamp2;
spin_unlock_irqrestore(&dac33->lock, flags);
dac33_write16(codec, DAC33_PREFILL_MSB,
dac33_write16(component, DAC33_PREFILL_MSB,
DAC33_THRREG(dac33->alarm_threshold));
/* Enable Alarm Threshold IRQ with a delay */
delay = SAMPLES_TO_US(dac33->burst_rate,
dac33->alarm_threshold) + 1000;
usleep_range(delay, delay + 500);
dac33_write(codec, DAC33_FIFO_IRQ_MASK, DAC33_MAT);
dac33_write(component, DAC33_FIFO_IRQ_MASK, DAC33_MAT);
break;
case DAC33_FIFO_MODE7:
/* Take the timestamp */
@ -689,14 +689,14 @@ static inline void dac33_prefill_handler(struct tlv320dac33_priv *dac33)
dac33->t_stamp1 -= dac33->mode7_us_to_lthr;
spin_unlock_irqrestore(&dac33->lock, flags);
dac33_write16(codec, DAC33_PREFILL_MSB,
dac33_write16(component, DAC33_PREFILL_MSB,
DAC33_THRREG(DAC33_MODE7_MARGIN));
/* Enable Upper Threshold IRQ */
dac33_write(codec, DAC33_FIFO_IRQ_MASK, DAC33_MUT);
dac33_write(component, DAC33_FIFO_IRQ_MASK, DAC33_MUT);
break;
default:
dev_warn(codec->dev, "Unhandled FIFO mode: %d\n",
dev_warn(component->dev, "Unhandled FIFO mode: %d\n",
dac33->fifo_mode);
break;
}
@ -704,7 +704,7 @@ static inline void dac33_prefill_handler(struct tlv320dac33_priv *dac33)
static inline void dac33_playback_handler(struct tlv320dac33_priv *dac33)
{
struct snd_soc_codec *codec = dac33->codec;
struct snd_soc_component *component = dac33->component;
unsigned long flags;
switch (dac33->fifo_mode) {
@ -714,14 +714,14 @@ static inline void dac33_playback_handler(struct tlv320dac33_priv *dac33)
dac33->t_stamp2 = ktime_to_us(ktime_get());
spin_unlock_irqrestore(&dac33->lock, flags);
dac33_write16(codec, DAC33_NSAMPLE_MSB,
dac33_write16(component, DAC33_NSAMPLE_MSB,
DAC33_THRREG(dac33->nsample));
break;
case DAC33_FIFO_MODE7:
/* At the moment we are not using interrupts in mode7 */
break;
default:
dev_warn(codec->dev, "Unhandled FIFO mode: %d\n",
dev_warn(component->dev, "Unhandled FIFO mode: %d\n",
dac33->fifo_mode);
break;
}
@ -729,12 +729,12 @@ static inline void dac33_playback_handler(struct tlv320dac33_priv *dac33)
static void dac33_work(struct work_struct *work)
{
struct snd_soc_codec *codec;
struct snd_soc_component *component;
struct tlv320dac33_priv *dac33;
u8 reg;
dac33 = container_of(work, struct tlv320dac33_priv, work);
codec = dac33->codec;
component = dac33->component;
mutex_lock(&dac33->mutex);
switch (dac33->state) {
@ -750,12 +750,12 @@ static void dac33_work(struct work_struct *work)
case DAC33_FLUSH:
dac33->state = DAC33_IDLE;
/* Mask all interrupts from dac33 */
dac33_write(codec, DAC33_FIFO_IRQ_MASK, 0);
dac33_write(component, DAC33_FIFO_IRQ_MASK, 0);
/* flush fifo */
reg = dac33_read_reg_cache(codec, DAC33_FIFO_CTRL_A);
reg = dac33_read_reg_cache(component, DAC33_FIFO_CTRL_A);
reg |= DAC33_FIFOFLUSH;
dac33_write(codec, DAC33_FIFO_CTRL_A, reg);
dac33_write(component, DAC33_FIFO_CTRL_A, reg);
break;
}
mutex_unlock(&dac33->mutex);
@ -763,8 +763,8 @@ static void dac33_work(struct work_struct *work)
static irqreturn_t dac33_interrupt_handler(int irq, void *dev)
{
struct snd_soc_codec *codec = dev;
struct tlv320dac33_priv *dac33 = snd_soc_codec_get_drvdata(codec);
struct snd_soc_component *component = dev;
struct tlv320dac33_priv *dac33 = snd_soc_component_get_drvdata(component);
unsigned long flags;
spin_lock_irqsave(&dac33->lock, flags);
@ -778,25 +778,25 @@ static irqreturn_t dac33_interrupt_handler(int irq, void *dev)
return IRQ_HANDLED;
}
static void dac33_oscwait(struct snd_soc_codec *codec)
static void dac33_oscwait(struct snd_soc_component *component)
{
int timeout = 60;
u8 reg;
do {
usleep_range(1000, 2000);
dac33_read(codec, DAC33_INT_OSC_STATUS, &reg);
dac33_read(component, DAC33_INT_OSC_STATUS, &reg);
} while (((reg & 0x03) != DAC33_OSCSTATUS_NORMAL) && timeout--);
if ((reg & 0x03) != DAC33_OSCSTATUS_NORMAL)
dev_err(codec->dev,
dev_err(component->dev,
"internal oscillator calibration failed\n");
}
static int dac33_startup(struct snd_pcm_substream *substream,
struct snd_soc_dai *dai)
{
struct snd_soc_codec *codec = dai->codec;
struct tlv320dac33_priv *dac33 = snd_soc_codec_get_drvdata(codec);
struct snd_soc_component *component = dai->component;
struct tlv320dac33_priv *dac33 = snd_soc_component_get_drvdata(component);
/* Stream started, save the substream pointer */
dac33->substream = substream;
@ -807,8 +807,8 @@ static int dac33_startup(struct snd_pcm_substream *substream,
static void dac33_shutdown(struct snd_pcm_substream *substream,
struct snd_soc_dai *dai)
{
struct snd_soc_codec *codec = dai->codec;
struct tlv320dac33_priv *dac33 = snd_soc_codec_get_drvdata(codec);
struct snd_soc_component *component = dai->component;
struct tlv320dac33_priv *dac33 = snd_soc_component_get_drvdata(component);
dac33->substream = NULL;
}
@ -819,8 +819,8 @@ static int dac33_hw_params(struct snd_pcm_substream *substream,
struct snd_pcm_hw_params *params,
struct snd_soc_dai *dai)
{
struct snd_soc_codec *codec = dai->codec;
struct tlv320dac33_priv *dac33 = snd_soc_codec_get_drvdata(codec);
struct snd_soc_component *component = dai->component;
struct tlv320dac33_priv *dac33 = snd_soc_component_get_drvdata(component);
/* Check parameters for validity */
switch (params_rate(params)) {
@ -828,7 +828,7 @@ static int dac33_hw_params(struct snd_pcm_substream *substream,
case 48000:
break;
default:
dev_err(codec->dev, "unsupported rate %d\n",
dev_err(component->dev, "unsupported rate %d\n",
params_rate(params));
return -EINVAL;
}
@ -843,7 +843,7 @@ static int dac33_hw_params(struct snd_pcm_substream *substream,
dac33->burst_rate = CALC_BURST_RATE(dac33->burst_bclkdiv, 64);
break;
default:
dev_err(codec->dev, "unsupported width %d\n",
dev_err(component->dev, "unsupported width %d\n",
params_width(params));
return -EINVAL;
}
@ -862,9 +862,9 @@ static int dac33_hw_params(struct snd_pcm_substream *substream,
* Use the known, working sequence of register writes to initialize the dac33.
*/
static int dac33_prepare_chip(struct snd_pcm_substream *substream,
struct snd_soc_codec *codec)
struct snd_soc_component *component)
{
struct tlv320dac33_priv *dac33 = snd_soc_codec_get_drvdata(codec);
struct tlv320dac33_priv *dac33 = snd_soc_component_get_drvdata(component);
unsigned int oscset, ratioset, pwr_ctrl, reg_tmp;
u8 aictrl_a, aictrl_b, fifoctrl_a;
@ -876,16 +876,16 @@ static int dac33_prepare_chip(struct snd_pcm_substream *substream,
dac33->refclk);
break;
default:
dev_err(codec->dev, "unsupported rate %d\n",
dev_err(component->dev, "unsupported rate %d\n",
substream->runtime->rate);
return -EINVAL;
}
aictrl_a = dac33_read_reg_cache(codec, DAC33_SER_AUDIOIF_CTRL_A);
aictrl_a = dac33_read_reg_cache(component, DAC33_SER_AUDIOIF_CTRL_A);
aictrl_a &= ~(DAC33_NCYCL_MASK | DAC33_WLEN_MASK);
/* Read FIFO control A, and clear FIFO flush bit */
fifoctrl_a = dac33_read_reg_cache(codec, DAC33_FIFO_CTRL_A);
fifoctrl_a = dac33_read_reg_cache(component, DAC33_FIFO_CTRL_A);
fifoctrl_a &= ~DAC33_FIFOFLUSH;
fifoctrl_a &= ~DAC33_WIDTH;
@ -898,7 +898,7 @@ static int dac33_prepare_chip(struct snd_pcm_substream *substream,
aictrl_a |= (DAC33_NCYCL_32 | DAC33_WLEN_24);
break;
default:
dev_err(codec->dev, "unsupported format %d\n",
dev_err(component->dev, "unsupported format %d\n",
substream->runtime->format);
return -EINVAL;
}
@ -914,57 +914,57 @@ static int dac33_prepare_chip(struct snd_pcm_substream *substream,
return 0;
}
dac33_soft_power(codec, 0);
dac33_soft_power(codec, 1);
dac33_soft_power(component, 0);
dac33_soft_power(component, 1);
reg_tmp = dac33_read_reg_cache(codec, DAC33_INT_OSC_CTRL);
dac33_write(codec, DAC33_INT_OSC_CTRL, reg_tmp);
reg_tmp = dac33_read_reg_cache(component, DAC33_INT_OSC_CTRL);
dac33_write(component, DAC33_INT_OSC_CTRL, reg_tmp);
/* Write registers 0x08 and 0x09 (MSB, LSB) */
dac33_write16(codec, DAC33_INT_OSC_FREQ_RAT_A, oscset);
dac33_write16(component, DAC33_INT_OSC_FREQ_RAT_A, oscset);
/* OSC calibration time */
dac33_write(codec, DAC33_CALIB_TIME, 96);
dac33_write(component, DAC33_CALIB_TIME, 96);
/* adjustment treshold & step */
dac33_write(codec, DAC33_INT_OSC_CTRL_B, DAC33_ADJTHRSHLD(2) |
dac33_write(component, DAC33_INT_OSC_CTRL_B, DAC33_ADJTHRSHLD(2) |
DAC33_ADJSTEP(1));
/* div=4 / gain=1 / div */
dac33_write(codec, DAC33_INT_OSC_CTRL_C, DAC33_REFDIV(4));
dac33_write(component, DAC33_INT_OSC_CTRL_C, DAC33_REFDIV(4));
pwr_ctrl = dac33_read_reg_cache(codec, DAC33_PWR_CTRL);
pwr_ctrl = dac33_read_reg_cache(component, DAC33_PWR_CTRL);
pwr_ctrl |= DAC33_OSCPDNB | DAC33_DACRPDNB | DAC33_DACLPDNB;
dac33_write(codec, DAC33_PWR_CTRL, pwr_ctrl);
dac33_write(component, DAC33_PWR_CTRL, pwr_ctrl);
dac33_oscwait(codec);
dac33_oscwait(component);
if (dac33->fifo_mode) {
/* Generic for all FIFO modes */
/* 50-51 : ASRC Control registers */
dac33_write(codec, DAC33_ASRC_CTRL_A, DAC33_SRCLKDIV(1));
dac33_write(codec, DAC33_ASRC_CTRL_B, 1); /* ??? */
dac33_write(component, DAC33_ASRC_CTRL_A, DAC33_SRCLKDIV(1));
dac33_write(component, DAC33_ASRC_CTRL_B, 1); /* ??? */
/* Write registers 0x34 and 0x35 (MSB, LSB) */
dac33_write16(codec, DAC33_SRC_REF_CLK_RATIO_A, ratioset);
dac33_write16(component, DAC33_SRC_REF_CLK_RATIO_A, ratioset);
/* Set interrupts to high active */
dac33_write(codec, DAC33_INTP_CTRL_A, DAC33_INTPM_AHIGH);
dac33_write(component, DAC33_INTP_CTRL_A, DAC33_INTPM_AHIGH);
} else {
/* FIFO bypass mode */
/* 50-51 : ASRC Control registers */
dac33_write(codec, DAC33_ASRC_CTRL_A, DAC33_SRCBYP);
dac33_write(codec, DAC33_ASRC_CTRL_B, 0); /* ??? */
dac33_write(component, DAC33_ASRC_CTRL_A, DAC33_SRCBYP);
dac33_write(component, DAC33_ASRC_CTRL_B, 0); /* ??? */
}
/* Interrupt behaviour configuration */
switch (dac33->fifo_mode) {
case DAC33_FIFO_MODE1:
dac33_write(codec, DAC33_FIFO_IRQ_MODE_B,
dac33_write(component, DAC33_FIFO_IRQ_MODE_B,
DAC33_ATM(DAC33_FIFO_IRQ_MODE_LEVEL));
break;
case DAC33_FIFO_MODE7:
dac33_write(codec, DAC33_FIFO_IRQ_MODE_A,
dac33_write(component, DAC33_FIFO_IRQ_MODE_A,
DAC33_UTM(DAC33_FIFO_IRQ_MODE_LEVEL));
break;
default:
@ -972,7 +972,7 @@ static int dac33_prepare_chip(struct snd_pcm_substream *substream,
break;
}
aictrl_b = dac33_read_reg_cache(codec, DAC33_SER_AUDIOIF_CTRL_B);
aictrl_b = dac33_read_reg_cache(component, DAC33_SER_AUDIOIF_CTRL_B);
switch (dac33->fifo_mode) {
case DAC33_FIFO_MODE1:
@ -1014,9 +1014,9 @@ static int dac33_prepare_chip(struct snd_pcm_substream *substream,
break;
}
dac33_write(codec, DAC33_FIFO_CTRL_A, fifoctrl_a);
dac33_write(codec, DAC33_SER_AUDIOIF_CTRL_A, aictrl_a);
dac33_write(codec, DAC33_SER_AUDIOIF_CTRL_B, aictrl_b);
dac33_write(component, DAC33_FIFO_CTRL_A, fifoctrl_a);
dac33_write(component, DAC33_SER_AUDIOIF_CTRL_A, aictrl_a);
dac33_write(component, DAC33_SER_AUDIOIF_CTRL_B, aictrl_b);
/*
* BCLK divide ratio
@ -1028,17 +1028,17 @@ static int dac33_prepare_chip(struct snd_pcm_substream *substream,
* 255: 255
*/
if (dac33->fifo_mode)
dac33_write(codec, DAC33_SER_AUDIOIF_CTRL_C,
dac33_write(component, DAC33_SER_AUDIOIF_CTRL_C,
dac33->burst_bclkdiv);
else
if (substream->runtime->format == SNDRV_PCM_FORMAT_S16_LE)
dac33_write(codec, DAC33_SER_AUDIOIF_CTRL_C, 32);
dac33_write(component, DAC33_SER_AUDIOIF_CTRL_C, 32);
else
dac33_write(codec, DAC33_SER_AUDIOIF_CTRL_C, 16);
dac33_write(component, DAC33_SER_AUDIOIF_CTRL_C, 16);
switch (dac33->fifo_mode) {
case DAC33_FIFO_MODE1:
dac33_write16(codec, DAC33_ATHR_MSB,
dac33_write16(component, DAC33_ATHR_MSB,
DAC33_THRREG(dac33->alarm_threshold));
break;
case DAC33_FIFO_MODE7:
@ -1046,8 +1046,8 @@ static int dac33_prepare_chip(struct snd_pcm_substream *substream,
* Configure the threshold levels, and leave 10 sample space
* at the bottom, and also at the top of the FIFO
*/
dac33_write16(codec, DAC33_UTHR_MSB, DAC33_THRREG(dac33->uthr));
dac33_write16(codec, DAC33_LTHR_MSB,
dac33_write16(component, DAC33_UTHR_MSB, DAC33_THRREG(dac33->uthr));
dac33_write16(component, DAC33_LTHR_MSB,
DAC33_THRREG(DAC33_MODE7_MARGIN));
break;
default:
@ -1060,9 +1060,9 @@ static int dac33_prepare_chip(struct snd_pcm_substream *substream,
}
static void dac33_calculate_times(struct snd_pcm_substream *substream,
struct snd_soc_codec *codec)
struct snd_soc_component *component)
{
struct tlv320dac33_priv *dac33 = snd_soc_codec_get_drvdata(codec);
struct tlv320dac33_priv *dac33 = snd_soc_component_get_drvdata(component);
unsigned int period_size = substream->runtime->period_size;
unsigned int rate = substream->runtime->rate;
unsigned int nsample_limit;
@ -1119,8 +1119,8 @@ static void dac33_calculate_times(struct snd_pcm_substream *substream,
static int dac33_pcm_trigger(struct snd_pcm_substream *substream, int cmd,
struct snd_soc_dai *dai)
{
struct snd_soc_codec *codec = dai->codec;
struct tlv320dac33_priv *dac33 = snd_soc_codec_get_drvdata(codec);
struct snd_soc_component *component = dai->component;
struct tlv320dac33_priv *dac33 = snd_soc_component_get_drvdata(component);
int ret = 0;
switch (cmd) {
@ -1151,8 +1151,8 @@ static snd_pcm_sframes_t dac33_dai_delay(
struct snd_pcm_substream *substream,
struct snd_soc_dai *dai)
{
struct snd_soc_codec *codec = dai->codec;
struct tlv320dac33_priv *dac33 = snd_soc_codec_get_drvdata(codec);
struct snd_soc_component *component = dai->component;
struct tlv320dac33_priv *dac33 = snd_soc_component_get_drvdata(component);
unsigned long long t0, t1, t_now;
unsigned int time_delta, uthr;
int samples_out, samples_in, samples;
@ -1284,7 +1284,7 @@ static snd_pcm_sframes_t dac33_dai_delay(
}
break;
default:
dev_warn(codec->dev, "Unhandled FIFO mode: %d\n",
dev_warn(component->dev, "Unhandled FIFO mode: %d\n",
dac33->fifo_mode);
break;
}
@ -1295,12 +1295,12 @@ static snd_pcm_sframes_t dac33_dai_delay(
static int dac33_set_dai_sysclk(struct snd_soc_dai *codec_dai,
int clk_id, unsigned int freq, int dir)
{
struct snd_soc_codec *codec = codec_dai->codec;
struct tlv320dac33_priv *dac33 = snd_soc_codec_get_drvdata(codec);
struct snd_soc_component *component = codec_dai->component;
struct tlv320dac33_priv *dac33 = snd_soc_component_get_drvdata(component);
u8 ioc_reg, asrcb_reg;
ioc_reg = dac33_read_reg_cache(codec, DAC33_INT_OSC_CTRL);
asrcb_reg = dac33_read_reg_cache(codec, DAC33_ASRC_CTRL_B);
ioc_reg = dac33_read_reg_cache(component, DAC33_INT_OSC_CTRL);
asrcb_reg = dac33_read_reg_cache(component, DAC33_ASRC_CTRL_B);
switch (clk_id) {
case TLV320DAC33_MCLK:
ioc_reg |= DAC33_REFSEL;
@ -1311,13 +1311,13 @@ static int dac33_set_dai_sysclk(struct snd_soc_dai *codec_dai,
asrcb_reg &= ~DAC33_SRCREFSEL;
break;
default:
dev_err(codec->dev, "Invalid clock ID (%d)\n", clk_id);
dev_err(component->dev, "Invalid clock ID (%d)\n", clk_id);
break;
}
dac33->refclk = freq;
dac33_write_reg_cache(codec, DAC33_INT_OSC_CTRL, ioc_reg);
dac33_write_reg_cache(codec, DAC33_ASRC_CTRL_B, asrcb_reg);
dac33_write_reg_cache(component, DAC33_INT_OSC_CTRL, ioc_reg);
dac33_write_reg_cache(component, DAC33_ASRC_CTRL_B, asrcb_reg);
return 0;
}
@ -1325,12 +1325,12 @@ static int dac33_set_dai_sysclk(struct snd_soc_dai *codec_dai,
static int dac33_set_dai_fmt(struct snd_soc_dai *codec_dai,
unsigned int fmt)
{
struct snd_soc_codec *codec = codec_dai->codec;
struct tlv320dac33_priv *dac33 = snd_soc_codec_get_drvdata(codec);
struct snd_soc_component *component = codec_dai->component;
struct tlv320dac33_priv *dac33 = snd_soc_component_get_drvdata(component);
u8 aictrl_a, aictrl_b;
aictrl_a = dac33_read_reg_cache(codec, DAC33_SER_AUDIOIF_CTRL_A);
aictrl_b = dac33_read_reg_cache(codec, DAC33_SER_AUDIOIF_CTRL_B);
aictrl_a = dac33_read_reg_cache(component, DAC33_SER_AUDIOIF_CTRL_A);
aictrl_b = dac33_read_reg_cache(component, DAC33_SER_AUDIOIF_CTRL_B);
/* set master/slave audio interface */
switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
case SND_SOC_DAIFMT_CBM_CFM:
@ -1340,7 +1340,7 @@ static int dac33_set_dai_fmt(struct snd_soc_dai *codec_dai,
case SND_SOC_DAIFMT_CBS_CFS:
/* Codec Slave */
if (dac33->fifo_mode) {
dev_err(codec->dev, "FIFO mode requires master mode\n");
dev_err(component->dev, "FIFO mode requires master mode\n");
return -EINVAL;
} else
aictrl_a &= ~(DAC33_MSBCLK | DAC33_MSWCLK);
@ -1366,35 +1366,35 @@ static int dac33_set_dai_fmt(struct snd_soc_dai *codec_dai,
aictrl_a |= DAC33_AFMT_LEFT_J;
break;
default:
dev_err(codec->dev, "Unsupported format (%u)\n",
dev_err(component->dev, "Unsupported format (%u)\n",
fmt & SND_SOC_DAIFMT_FORMAT_MASK);
return -EINVAL;
}
dac33_write_reg_cache(codec, DAC33_SER_AUDIOIF_CTRL_A, aictrl_a);
dac33_write_reg_cache(codec, DAC33_SER_AUDIOIF_CTRL_B, aictrl_b);
dac33_write_reg_cache(component, DAC33_SER_AUDIOIF_CTRL_A, aictrl_a);
dac33_write_reg_cache(component, DAC33_SER_AUDIOIF_CTRL_B, aictrl_b);
return 0;
}
static int dac33_soc_probe(struct snd_soc_codec *codec)
static int dac33_soc_probe(struct snd_soc_component *component)
{
struct tlv320dac33_priv *dac33 = snd_soc_codec_get_drvdata(codec);
struct tlv320dac33_priv *dac33 = snd_soc_component_get_drvdata(component);
int ret = 0;
dac33->codec = codec;
dac33->component = component;
/* Read the tlv320dac33 ID registers */
ret = dac33_hard_power(codec, 1);
ret = dac33_hard_power(component, 1);
if (ret != 0) {
dev_err(codec->dev, "Failed to power up codec: %d\n", ret);
dev_err(component->dev, "Failed to power up component: %d\n", ret);
goto err_power;
}
ret = dac33_read_id(codec);
dac33_hard_power(codec, 0);
ret = dac33_read_id(component);
dac33_hard_power(component, 0);
if (ret < 0) {
dev_err(codec->dev, "Failed to read chip ID: %d\n", ret);
dev_err(component->dev, "Failed to read chip ID: %d\n", ret);
ret = -ENODEV;
goto err_power;
}
@ -1403,9 +1403,9 @@ static int dac33_soc_probe(struct snd_soc_codec *codec)
if (dac33->irq >= 0) {
ret = request_irq(dac33->irq, dac33_interrupt_handler,
IRQF_TRIGGER_RISING,
codec->component.name, codec);
component->name, component);
if (ret < 0) {
dev_err(codec->dev, "Could not request IRQ%d (%d)\n",
dev_err(component->dev, "Could not request IRQ%d (%d)\n",
dac33->irq, ret);
dac33->irq = -1;
}
@ -1416,41 +1416,38 @@ static int dac33_soc_probe(struct snd_soc_codec *codec)
/* Only add the FIFO controls, if we have valid IRQ number */
if (dac33->irq >= 0)
snd_soc_add_codec_controls(codec, dac33_mode_snd_controls,
snd_soc_add_component_controls(component, dac33_mode_snd_controls,
ARRAY_SIZE(dac33_mode_snd_controls));
err_power:
return ret;
}
static int dac33_soc_remove(struct snd_soc_codec *codec)
static void dac33_soc_remove(struct snd_soc_component *component)
{
struct tlv320dac33_priv *dac33 = snd_soc_codec_get_drvdata(codec);
struct tlv320dac33_priv *dac33 = snd_soc_component_get_drvdata(component);
if (dac33->irq >= 0) {
free_irq(dac33->irq, dac33->codec);
free_irq(dac33->irq, dac33->component);
flush_work(&dac33->work);
}
return 0;
}
static const struct snd_soc_codec_driver soc_codec_dev_tlv320dac33 = {
.read = dac33_read_reg_cache,
.write = dac33_write_locked,
.set_bias_level = dac33_set_bias_level,
.idle_bias_off = true,
.probe = dac33_soc_probe,
.remove = dac33_soc_remove,
.component_driver = {
.controls = dac33_snd_controls,
.num_controls = ARRAY_SIZE(dac33_snd_controls),
.dapm_widgets = dac33_dapm_widgets,
.num_dapm_widgets = ARRAY_SIZE(dac33_dapm_widgets),
.dapm_routes = audio_map,
.num_dapm_routes = ARRAY_SIZE(audio_map),
},
static const struct snd_soc_component_driver soc_component_dev_tlv320dac33 = {
.read = dac33_read_reg_cache,
.write = dac33_write_locked,
.set_bias_level = dac33_set_bias_level,
.probe = dac33_soc_probe,
.remove = dac33_soc_remove,
.controls = dac33_snd_controls,
.num_controls = ARRAY_SIZE(dac33_snd_controls),
.dapm_widgets = dac33_dapm_widgets,
.num_dapm_widgets = ARRAY_SIZE(dac33_dapm_widgets),
.dapm_routes = audio_map,
.num_dapm_routes = ARRAY_SIZE(audio_map),
.use_pmdown_time = 1,
.endianness = 1,
.non_legacy_dai_naming = 1,
};
#define DAC33_RATES (SNDRV_PCM_RATE_44100 | \
@ -1544,8 +1541,8 @@ static int dac33_i2c_probe(struct i2c_client *client,
goto err_get;
}
ret = snd_soc_register_codec(&client->dev,
&soc_codec_dev_tlv320dac33, &dac33_dai, 1);
ret = devm_snd_soc_register_component(&client->dev,
&soc_component_dev_tlv320dac33, &dac33_dai, 1);
if (ret < 0)
goto err_get;
@ -1562,12 +1559,11 @@ static int dac33_i2c_remove(struct i2c_client *client)
struct tlv320dac33_priv *dac33 = i2c_get_clientdata(client);
if (unlikely(dac33->chip_power))
dac33_hard_power(dac33->codec, 0);
dac33_hard_power(dac33->component, 0);
if (dac33->power_gpio >= 0)
gpio_free(dac33->power_gpio);
snd_soc_unregister_codec(&client->dev);
return 0;
}

248
sound/soc/codecs/tscs42xx.c
View File

@ -3,14 +3,19 @@
// Copyright 2017 Tempo Semiconductor, Inc.
// Author: Steven Eckhoff <steven.eckhoff.opensource@gmail.com>
#include <linux/i2c.h>
#include <linux/module.h>
#include <linux/mutex.h>
#include <linux/kernel.h>
#include <linux/device.h>
#include <linux/regmap.h>
#include <linux/i2c.h>
#include <linux/err.h>
#include <linux/string.h>
#include <linux/module.h>
#include <linux/delay.h>
#include <linux/mutex.h>
#include <sound/tlv.h>
#include <sound/pcm_params.h>
#include <sound/soc.h>
#include <sound/soc-dapm.h>
#include <sound/tlv.h>
#include "tscs42xx.h"
@ -91,15 +96,15 @@ static const struct regmap_config tscs42xx_regmap = {
};
#define MAX_PLL_LOCK_20MS_WAITS 1
static bool plls_locked(struct snd_soc_codec *codec)
static bool plls_locked(struct snd_soc_component *component)
{
int ret;
int count = MAX_PLL_LOCK_20MS_WAITS;
do {
ret = snd_soc_read(codec, R_PLLCTL0);
ret = snd_soc_component_read32(component, R_PLLCTL0);
if (ret < 0) {
dev_err(codec->dev,
dev_err(component->dev,
"Failed to read PLL lock status (%d)\n", ret);
return false;
} else if (ret > 0) {
@ -131,10 +136,10 @@ static int sample_rate_to_pll_freq_out(int sample_rate)
}
#define DACCRSTAT_MAX_TRYS 10
static int write_coeff_ram(struct snd_soc_codec *codec, u8 *coeff_ram,
static int write_coeff_ram(struct snd_soc_component *component, u8 *coeff_ram,
unsigned int addr, unsigned int coeff_cnt)
{
struct tscs42xx *tscs42xx = snd_soc_codec_get_drvdata(codec);
struct tscs42xx *tscs42xx = snd_soc_component_get_drvdata(component);
int cnt;
int trys;
int ret;
@ -142,9 +147,9 @@ static int write_coeff_ram(struct snd_soc_codec *codec, u8 *coeff_ram,
for (cnt = 0; cnt < coeff_cnt; cnt++, addr++) {
for (trys = 0; trys < DACCRSTAT_MAX_TRYS; trys++) {
ret = snd_soc_read(codec, R_DACCRSTAT);
ret = snd_soc_component_read32(component, R_DACCRSTAT);
if (ret < 0) {
dev_err(codec->dev,
dev_err(component->dev,
"Failed to read stat (%d)\n", ret);
return ret;
}
@ -154,14 +159,14 @@ static int write_coeff_ram(struct snd_soc_codec *codec, u8 *coeff_ram,
if (trys == DACCRSTAT_MAX_TRYS) {
ret = -EIO;
dev_err(codec->dev,
dev_err(component->dev,
"dac coefficient write error (%d)\n", ret);
return ret;
}
ret = regmap_write(tscs42xx->regmap, R_DACCRADDR, addr);
if (ret < 0) {
dev_err(codec->dev,
dev_err(component->dev,
"Failed to write dac ram address (%d)\n", ret);
return ret;
}
@ -170,7 +175,7 @@ static int write_coeff_ram(struct snd_soc_codec *codec, u8 *coeff_ram,
&coeff_ram[addr * COEFF_SIZE],
COEFF_SIZE);
if (ret < 0) {
dev_err(codec->dev,
dev_err(component->dev,
"Failed to write dac ram (%d)\n", ret);
return ret;
}
@ -179,9 +184,9 @@ static int write_coeff_ram(struct snd_soc_codec *codec, u8 *coeff_ram,
return 0;
}
static int power_up_audio_plls(struct snd_soc_codec *codec)
static int power_up_audio_plls(struct snd_soc_component *component)
{
struct tscs42xx *tscs42xx = snd_soc_codec_get_drvdata(codec);
struct tscs42xx *tscs42xx = snd_soc_component_get_drvdata(component);
int freq_out;
int ret;
unsigned int mask;
@ -199,20 +204,20 @@ static int power_up_audio_plls(struct snd_soc_codec *codec)
break;
default:
ret = -EINVAL;
dev_err(codec->dev, "Unrecognized PLL output freq (%d)\n", ret);
dev_err(component->dev, "Unrecognized PLL output freq (%d)\n", ret);
return ret;
}
mutex_lock(&tscs42xx->pll_lock);
ret = snd_soc_update_bits(codec, R_PLLCTL1C, mask, val);
ret = snd_soc_component_update_bits(component, R_PLLCTL1C, mask, val);
if (ret < 0) {
dev_err(codec->dev, "Failed to turn PLL on (%d)\n", ret);
dev_err(component->dev, "Failed to turn PLL on (%d)\n", ret);
goto exit;
}
if (!plls_locked(codec)) {
dev_err(codec->dev, "Failed to lock plls\n");
if (!plls_locked(component)) {
dev_err(component->dev, "Failed to lock plls\n");
ret = -ENOMSG;
goto exit;
}
@ -224,25 +229,25 @@ static int power_up_audio_plls(struct snd_soc_codec *codec)
return ret;
}
static int power_down_audio_plls(struct snd_soc_codec *codec)
static int power_down_audio_plls(struct snd_soc_component *component)
{
struct tscs42xx *tscs42xx = snd_soc_codec_get_drvdata(codec);
struct tscs42xx *tscs42xx = snd_soc_component_get_drvdata(component);
int ret;
mutex_lock(&tscs42xx->pll_lock);
ret = snd_soc_update_bits(codec, R_PLLCTL1C,
ret = snd_soc_component_update_bits(component, R_PLLCTL1C,
RM_PLLCTL1C_PDB_PLL1,
RV_PLLCTL1C_PDB_PLL1_DISABLE);
if (ret < 0) {
dev_err(codec->dev, "Failed to turn PLL off (%d)\n", ret);
dev_err(component->dev, "Failed to turn PLL off (%d)\n", ret);
goto exit;
}
ret = snd_soc_update_bits(codec, R_PLLCTL1C,
ret = snd_soc_component_update_bits(component, R_PLLCTL1C,
RM_PLLCTL1C_PDB_PLL2,
RV_PLLCTL1C_PDB_PLL2_DISABLE);
if (ret < 0) {
dev_err(codec->dev, "Failed to turn PLL off (%d)\n", ret);
dev_err(component->dev, "Failed to turn PLL off (%d)\n", ret);
goto exit;
}
@ -256,8 +261,8 @@ static int power_down_audio_plls(struct snd_soc_codec *codec)
static int coeff_ram_get(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_value *ucontrol)
{
struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
struct tscs42xx *tscs42xx = snd_soc_codec_get_drvdata(codec);
struct snd_soc_component *component = snd_soc_kcontrol_component(kcontrol);
struct tscs42xx *tscs42xx = snd_soc_component_get_drvdata(component);
struct coeff_ram_ctl *ctl =
(struct coeff_ram_ctl *)kcontrol->private_value;
struct soc_bytes_ext *params = &ctl->bytes_ext;
@ -275,8 +280,8 @@ static int coeff_ram_get(struct snd_kcontrol *kcontrol,
static int coeff_ram_put(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_value *ucontrol)
{
struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
struct tscs42xx *tscs42xx = snd_soc_codec_get_drvdata(codec);
struct snd_soc_component *component = snd_soc_kcontrol_component(kcontrol);
struct tscs42xx *tscs42xx = snd_soc_component_get_drvdata(component);
struct coeff_ram_ctl *ctl =
(struct coeff_ram_ctl *)kcontrol->private_value;
struct soc_bytes_ext *params = &ctl->bytes_ext;
@ -292,11 +297,11 @@ static int coeff_ram_put(struct snd_kcontrol *kcontrol,
mutex_lock(&tscs42xx->pll_lock);
if (plls_locked(codec)) {
ret = write_coeff_ram(codec, tscs42xx->coeff_ram,
if (plls_locked(component)) {
ret = write_coeff_ram(component, tscs42xx->coeff_ram,
ctl->addr, coeff_cnt);
if (ret < 0) {
dev_err(codec->dev,
dev_err(component->dev,
"Failed to flush coeff ram cache (%d)\n", ret);
goto exit;
}
@ -358,13 +363,13 @@ static int dapm_micb_event(struct snd_soc_dapm_widget *w,
static int pll_event(struct snd_soc_dapm_widget *w,
struct snd_kcontrol *kcontrol, int event)
{
struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
int ret;
if (SND_SOC_DAPM_EVENT_ON(event))
ret = power_up_audio_plls(codec);
ret = power_up_audio_plls(component);
else
ret = power_down_audio_plls(codec);
ret = power_down_audio_plls(component);
return ret;
}
@ -372,14 +377,14 @@ static int pll_event(struct snd_soc_dapm_widget *w,
static int dac_event(struct snd_soc_dapm_widget *w,
struct snd_kcontrol *kcontrol, int event)
{
struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
struct tscs42xx *tscs42xx = snd_soc_codec_get_drvdata(codec);
struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
struct tscs42xx *tscs42xx = snd_soc_component_get_drvdata(component);
int ret;
mutex_lock(&tscs42xx->coeff_ram_lock);
if (tscs42xx->coeff_ram_synced == false) {
ret = write_coeff_ram(codec, tscs42xx->coeff_ram, 0x00,
ret = write_coeff_ram(component, tscs42xx->coeff_ram, 0x00,
COEFF_RAM_COEFF_COUNT);
if (ret < 0)
goto exit;
@ -790,7 +795,7 @@ static const struct snd_kcontrol_new tscs42xx_snd_controls[] = {
R_DACMBCREL3L, 2),
};
static int setup_sample_format(struct snd_soc_codec *codec,
static int setup_sample_format(struct snd_soc_component *component,
snd_pcm_format_t format)
{
unsigned int width;
@ -811,21 +816,21 @@ static int setup_sample_format(struct snd_soc_codec *codec,
break;
default:
ret = -EINVAL;
dev_err(codec->dev, "Unsupported format width (%d)\n", ret);
dev_err(component->dev, "Unsupported format width (%d)\n", ret);
return ret;
}
ret = snd_soc_update_bits(codec, R_AIC1, RM_AIC1_WL, width);
ret = snd_soc_component_update_bits(component, R_AIC1, RM_AIC1_WL, width);
if (ret < 0) {
dev_err(codec->dev, "Failed to set sample width (%d)\n", ret);
dev_err(component->dev, "Failed to set sample width (%d)\n", ret);
return ret;
}
return 0;
}
static int setup_sample_rate(struct snd_soc_codec *codec, unsigned int rate)
static int setup_sample_rate(struct snd_soc_component *component, unsigned int rate)
{
struct tscs42xx *tscs42xx = snd_soc_codec_get_drvdata(codec);
struct tscs42xx *tscs42xx = snd_soc_component_get_drvdata(component);
unsigned int br, bm;
int ret;
@ -871,29 +876,29 @@ static int setup_sample_rate(struct snd_soc_codec *codec, unsigned int rate)
bm = RV_DACSR_DBM_2;
break;
default:
dev_err(codec->dev, "Unsupported sample rate %d\n", rate);
dev_err(component->dev, "Unsupported sample rate %d\n", rate);
return -EINVAL;
}
/* DAC and ADC share bit and frame clock */
ret = snd_soc_update_bits(codec, R_DACSR, RM_DACSR_DBR, br);
ret = snd_soc_component_update_bits(component, R_DACSR, RM_DACSR_DBR, br);
if (ret < 0) {
dev_err(codec->dev, "Failed to update register (%d)\n", ret);
dev_err(component->dev, "Failed to update register (%d)\n", ret);
return ret;
}
ret = snd_soc_update_bits(codec, R_DACSR, RM_DACSR_DBM, bm);
ret = snd_soc_component_update_bits(component, R_DACSR, RM_DACSR_DBM, bm);
if (ret < 0) {
dev_err(codec->dev, "Failed to update register (%d)\n", ret);
dev_err(component->dev, "Failed to update register (%d)\n", ret);
return ret;
}
ret = snd_soc_update_bits(codec, R_ADCSR, RM_DACSR_DBR, br);
ret = snd_soc_component_update_bits(component, R_ADCSR, RM_DACSR_DBR, br);
if (ret < 0) {
dev_err(codec->dev, "Failed to update register (%d)\n", ret);
dev_err(component->dev, "Failed to update register (%d)\n", ret);
return ret;
}
ret = snd_soc_update_bits(codec, R_ADCSR, RM_DACSR_DBM, bm);
ret = snd_soc_component_update_bits(component, R_ADCSR, RM_DACSR_DBM, bm);
if (ret < 0) {
dev_err(codec->dev, "Failed to update register (%d)\n", ret);
dev_err(component->dev, "Failed to update register (%d)\n", ret);
return ret;
}
@ -1025,7 +1030,7 @@ static const struct pll_ctl *get_pll_ctl(int input_freq)
return pll_ctl;
}
static int set_pll_ctl_from_input_freq(struct snd_soc_codec *codec,
static int set_pll_ctl_from_input_freq(struct snd_soc_component *component,
const int input_freq)
{
int ret;
@ -1035,18 +1040,18 @@ static int set_pll_ctl_from_input_freq(struct snd_soc_codec *codec,
pll_ctl = get_pll_ctl(input_freq);
if (!pll_ctl) {
ret = -EINVAL;
dev_err(codec->dev, "No PLL input entry for %d (%d)\n",
dev_err(component->dev, "No PLL input entry for %d (%d)\n",
input_freq, ret);
return ret;
}
for (i = 0; i < PLL_REG_SETTINGS_COUNT; ++i) {
ret = snd_soc_update_bits(codec,
ret = snd_soc_component_update_bits(component,
pll_ctl->settings[i].addr,
pll_ctl->settings[i].mask,
pll_ctl->settings[i].val);
if (ret < 0) {
dev_err(codec->dev, "Failed to set pll ctl (%d)\n",
dev_err(component->dev, "Failed to set pll ctl (%d)\n",
ret);
return ret;
}
@ -1059,33 +1064,33 @@ static int tscs42xx_hw_params(struct snd_pcm_substream *substream,
struct snd_pcm_hw_params *params,
struct snd_soc_dai *codec_dai)
{
struct snd_soc_codec *codec = codec_dai->codec;
struct snd_soc_component *component = codec_dai->component;
int ret;
ret = setup_sample_format(codec, params_format(params));
ret = setup_sample_format(component, params_format(params));
if (ret < 0) {
dev_err(codec->dev, "Failed to setup sample format (%d)\n",
dev_err(component->dev, "Failed to setup sample format (%d)\n",
ret);
return ret;
}
ret = setup_sample_rate(codec, params_rate(params));
ret = setup_sample_rate(component, params_rate(params));
if (ret < 0) {
dev_err(codec->dev, "Failed to setup sample rate (%d)\n", ret);
dev_err(component->dev, "Failed to setup sample rate (%d)\n", ret);
return ret;
}
return 0;
}
static inline int dac_mute(struct snd_soc_codec *codec)
static inline int dac_mute(struct snd_soc_component *component)
{
int ret;
ret = snd_soc_update_bits(codec, R_CNVRTR1, RM_CNVRTR1_DACMU,
ret = snd_soc_component_update_bits(component, R_CNVRTR1, RM_CNVRTR1_DACMU,
RV_CNVRTR1_DACMU_ENABLE);
if (ret < 0) {
dev_err(codec->dev, "Failed to mute DAC (%d)\n",
dev_err(component->dev, "Failed to mute DAC (%d)\n",
ret);
return ret;
}
@ -1093,14 +1098,14 @@ static inline int dac_mute(struct snd_soc_codec *codec)
return 0;
}
static inline int dac_unmute(struct snd_soc_codec *codec)
static inline int dac_unmute(struct snd_soc_component *component)
{
int ret;
ret = snd_soc_update_bits(codec, R_CNVRTR1, RM_CNVRTR1_DACMU,
ret = snd_soc_component_update_bits(component, R_CNVRTR1, RM_CNVRTR1_DACMU,
RV_CNVRTR1_DACMU_DISABLE);
if (ret < 0) {
dev_err(codec->dev, "Failed to unmute DAC (%d)\n",
dev_err(component->dev, "Failed to unmute DAC (%d)\n",
ret);
return ret;
}
@ -1108,14 +1113,14 @@ static inline int dac_unmute(struct snd_soc_codec *codec)
return 0;
}
static inline int adc_mute(struct snd_soc_codec *codec)
static inline int adc_mute(struct snd_soc_component *component)
{
int ret;
ret = snd_soc_update_bits(codec, R_CNVRTR0, RM_CNVRTR0_ADCMU,
ret = snd_soc_component_update_bits(component, R_CNVRTR0, RM_CNVRTR0_ADCMU,
RV_CNVRTR0_ADCMU_ENABLE);
if (ret < 0) {
dev_err(codec->dev, "Failed to mute ADC (%d)\n",
dev_err(component->dev, "Failed to mute ADC (%d)\n",
ret);
return ret;
}
@ -1123,14 +1128,14 @@ static inline int adc_mute(struct snd_soc_codec *codec)
return 0;
}
static inline int adc_unmute(struct snd_soc_codec *codec)
static inline int adc_unmute(struct snd_soc_component *component)
{
int ret;
ret = snd_soc_update_bits(codec, R_CNVRTR0, RM_CNVRTR0_ADCMU,
ret = snd_soc_component_update_bits(component, R_CNVRTR0, RM_CNVRTR0_ADCMU,
RV_CNVRTR0_ADCMU_DISABLE);
if (ret < 0) {
dev_err(codec->dev, "Failed to unmute ADC (%d)\n",
dev_err(component->dev, "Failed to unmute ADC (%d)\n",
ret);
return ret;
}
@ -1140,19 +1145,19 @@ static inline int adc_unmute(struct snd_soc_codec *codec)
static int tscs42xx_mute_stream(struct snd_soc_dai *dai, int mute, int stream)
{
struct snd_soc_codec *codec = dai->codec;
struct snd_soc_component *component = dai->component;
int ret;
if (mute)
if (stream == SNDRV_PCM_STREAM_PLAYBACK)
ret = dac_mute(codec);
ret = dac_mute(component);
else
ret = adc_mute(codec);
ret = adc_mute(component);
else
if (stream == SNDRV_PCM_STREAM_PLAYBACK)
ret = dac_unmute(codec);
ret = dac_unmute(component);
else
ret = adc_unmute(codec);
ret = adc_unmute(component);
return ret;
}
@ -1160,23 +1165,23 @@ static int tscs42xx_mute_stream(struct snd_soc_dai *dai, int mute, int stream)
static int tscs42xx_set_dai_fmt(struct snd_soc_dai *codec_dai,
unsigned int fmt)
{
struct snd_soc_codec *codec = codec_dai->codec;
struct snd_soc_component *component = codec_dai->component;
int ret;
/* Slave mode not supported since it needs always-on frame clock */
switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
case SND_SOC_DAIFMT_CBM_CFM:
ret = snd_soc_update_bits(codec, R_AIC1, RM_AIC1_MS,
ret = snd_soc_component_update_bits(component, R_AIC1, RM_AIC1_MS,
RV_AIC1_MS_MASTER);
if (ret < 0) {
dev_err(codec->dev,
dev_err(component->dev,
"Failed to set codec DAI master (%d)\n", ret);
return ret;
}
break;
default:
ret = -EINVAL;
dev_err(codec->dev, "Unsupported format (%d)\n", ret);
dev_err(component->dev, "Unsupported format (%d)\n", ret);
return ret;
}
@ -1186,8 +1191,8 @@ static int tscs42xx_set_dai_fmt(struct snd_soc_dai *codec_dai,
static int tscs42xx_set_dai_bclk_ratio(struct snd_soc_dai *codec_dai,
unsigned int ratio)
{
struct snd_soc_codec *codec = codec_dai->codec;
struct tscs42xx *tscs42xx = snd_soc_codec_get_drvdata(codec);
struct snd_soc_component *component = codec_dai->component;
struct tscs42xx *tscs42xx = snd_soc_component_get_drvdata(component);
unsigned int value;
int ret = 0;
@ -1202,18 +1207,18 @@ static int tscs42xx_set_dai_bclk_ratio(struct snd_soc_dai *codec_dai,
value = RV_DACSR_DBCM_64;
break;
default:
dev_err(codec->dev, "Unsupported bclk ratio (%d)\n", ret);
dev_err(component->dev, "Unsupported bclk ratio (%d)\n", ret);
return -EINVAL;
}
ret = snd_soc_update_bits(codec, R_DACSR, RM_DACSR_DBCM, value);
ret = snd_soc_component_update_bits(component, R_DACSR, RM_DACSR_DBCM, value);
if (ret < 0) {
dev_err(codec->dev, "Failed to set DAC BCLK ratio (%d)\n", ret);
dev_err(component->dev, "Failed to set DAC BCLK ratio (%d)\n", ret);
return ret;
}
ret = snd_soc_update_bits(codec, R_ADCSR, RM_ADCSR_ABCM, value);
ret = snd_soc_component_update_bits(component, R_ADCSR, RM_ADCSR_ABCM, value);
if (ret < 0) {
dev_err(codec->dev, "Failed to set ADC BCLK ratio (%d)\n", ret);
dev_err(component->dev, "Failed to set ADC BCLK ratio (%d)\n", ret);
return ret;
}
@ -1229,40 +1234,40 @@ static int tscs42xx_set_dai_bclk_ratio(struct snd_soc_dai *codec_dai,
static int tscs42xx_set_dai_sysclk(struct snd_soc_dai *codec_dai,
int clk_id, unsigned int freq, int dir)
{
struct snd_soc_codec *codec = codec_dai->codec;
struct snd_soc_component *component = codec_dai->component;
int ret;
switch (clk_id) {
case TSCS42XX_PLL_SRC_XTAL:
case TSCS42XX_PLL_SRC_MCLK1:
ret = snd_soc_write(codec, R_PLLREFSEL,
ret = snd_soc_component_write(component, R_PLLREFSEL,
RV_PLLREFSEL_PLL1_REF_SEL_XTAL_MCLK1 |
RV_PLLREFSEL_PLL2_REF_SEL_XTAL_MCLK1);
if (ret < 0) {
dev_err(codec->dev,
dev_err(component->dev,
"Failed to set pll reference input (%d)\n",
ret);
return ret;
}
break;
case TSCS42XX_PLL_SRC_MCLK2:
ret = snd_soc_write(codec, R_PLLREFSEL,
ret = snd_soc_component_write(component, R_PLLREFSEL,
RV_PLLREFSEL_PLL1_REF_SEL_MCLK2 |
RV_PLLREFSEL_PLL2_REF_SEL_MCLK2);
if (ret < 0) {
dev_err(codec->dev,
dev_err(component->dev,
"Failed to set PLL reference (%d)\n", ret);
return ret;
}
break;
default:
dev_err(codec->dev, "pll src is unsupported\n");
dev_err(component->dev, "pll src is unsupported\n");
return -EINVAL;
}
ret = set_pll_ctl_from_input_freq(codec, freq);
ret = set_pll_ctl_from_input_freq(component, freq);
if (ret < 0) {
dev_err(codec->dev,
dev_err(component->dev,
"Failed to setup PLL input freq (%d)\n", ret);
return ret;
}
@ -1304,24 +1309,28 @@ static int part_is_valid(struct tscs42xx *tscs42xx)
};
}
static struct snd_soc_codec_driver soc_codec_dev_tscs42xx = {
.component_driver = {
.dapm_widgets = tscs42xx_dapm_widgets,
.num_dapm_widgets = ARRAY_SIZE(tscs42xx_dapm_widgets),
.dapm_routes = tscs42xx_intercon,
.num_dapm_routes = ARRAY_SIZE(tscs42xx_intercon),
.controls = tscs42xx_snd_controls,
.num_controls = ARRAY_SIZE(tscs42xx_snd_controls),
},
static struct snd_soc_component_driver soc_codec_dev_tscs42xx = {
.dapm_widgets = tscs42xx_dapm_widgets,
.num_dapm_widgets = ARRAY_SIZE(tscs42xx_dapm_widgets),
.dapm_routes = tscs42xx_intercon,
.num_dapm_routes = ARRAY_SIZE(tscs42xx_intercon),
.controls = tscs42xx_snd_controls,
.num_controls = ARRAY_SIZE(tscs42xx_snd_controls),
.idle_bias_on = 1,
.use_pmdown_time = 1,
.endianness = 1,
.non_legacy_dai_naming = 1,
};
static inline void init_coeff_ram_cache(struct tscs42xx *tscs42xx)
{
const u8 norm_addrs[] = { 0x00, 0x05, 0x0a, 0x0f, 0x14, 0x19, 0x1f,
0x20, 0x25, 0x2a, 0x2f, 0x34, 0x39, 0x3f, 0x40, 0x45, 0x4a,
0x4f, 0x54, 0x59, 0x5f, 0x60, 0x65, 0x6a, 0x6f, 0x74, 0x79,
0x7f, 0x80, 0x85, 0x8c, 0x91, 0x96, 0x97, 0x9c, 0xa3, 0xa8,
0xad, 0xaf, 0xb0, 0xb5, 0xba, 0xbf, 0xc4, 0xc9, };
static const u8 norm_addrs[] = {
0x00, 0x05, 0x0a, 0x0f, 0x14, 0x19, 0x1f, 0x20, 0x25, 0x2a,
0x2f, 0x34, 0x39, 0x3f, 0x40, 0x45, 0x4a, 0x4f, 0x54, 0x59,
0x5f, 0x60, 0x65, 0x6a, 0x6f, 0x74, 0x79, 0x7f, 0x80, 0x85,
0x8c, 0x91, 0x96, 0x97, 0x9c, 0xa3, 0xa8, 0xad, 0xaf, 0xb0,
0xb5, 0xba, 0xbf, 0xc4, 0xc9,
};
u8 *coeff_ram = tscs42xx->coeff_ram;
int i;
@ -1407,7 +1416,7 @@ static int tscs42xx_i2c_probe(struct i2c_client *i2c,
mutex_init(&tscs42xx->coeff_ram_lock);
mutex_init(&tscs42xx->pll_lock);
ret = snd_soc_register_codec(tscs42xx->dev, &soc_codec_dev_tscs42xx,
ret = devm_snd_soc_register_component(tscs42xx->dev, &soc_codec_dev_tscs42xx,
&tscs42xx_dai, 1);
if (ret) {
dev_err(tscs42xx->dev, "Failed to register codec (%d)\n", ret);
@ -1417,13 +1426,6 @@ static int tscs42xx_i2c_probe(struct i2c_client *i2c,
return 0;
}
static int tscs42xx_i2c_remove(struct i2c_client *client)
{
snd_soc_unregister_codec(&client->dev);
return 0;
}
static const struct i2c_device_id tscs42xx_i2c_id[] = {
{ "tscs42A1", 0 },
{ "tscs42A2", 0 },
@ -1441,11 +1443,9 @@ MODULE_DEVICE_TABLE(of, tscs42xx_of_match);
static struct i2c_driver tscs42xx_i2c_driver = {
.driver = {
.name = "tscs42xx",
.owner = THIS_MODULE,
.of_match_table = tscs42xx_of_match,
},
.probe = tscs42xx_i2c_probe,
.remove = tscs42xx_i2c_remove,
.id_table = tscs42xx_i2c_id,
};

12
sound/soc/soc-topology.c
View File

@ -504,6 +504,9 @@ static void remove_widget(struct snd_soc_component *comp,
if (dobj->ops && dobj->ops->widget_unload)
dobj->ops->widget_unload(comp, dobj);
if (!w->kcontrols)
goto free_news;
/*
* Dynamic Widgets either have 1..N enum kcontrols or mixers.
* The enum may either have an array of values or strings.
@ -525,7 +528,6 @@ static void remove_widget(struct snd_soc_component *comp,
kfree(se);
kfree(w->kcontrol_news[i].name);
}
kfree(w->kcontrol_news);
} else {
/* volume mixer or bytes controls */
for (i = 0; i < w->num_kcontrols; i++) {
@ -543,8 +545,11 @@ static void remove_widget(struct snd_soc_component *comp,
snd_ctl_remove(card, kcontrol);
kfree(w->kcontrol_news[i].name);
}
kfree(w->kcontrol_news);
}
free_news:
kfree(w->kcontrol_news);
/* widget w is freed by soc-dapm.c */
}
@ -1276,6 +1281,9 @@ static struct snd_kcontrol_new *soc_tplg_dapm_widget_dmixer_create(
kfree(sm);
continue;
}
/* create any TLV data */
soc_tplg_create_tlv(tplg, &kc[i], &mc->hdr);
}
return kc;