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dt-bindings: devfreq: rk3399_dmc: Add rockchip,pmu phandle

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The Rockchip DMC (Dynamic Memory Interface) needs to access to the PMU
general register files to know the DRAM type, so add a phandle to the
syscon that manages these registers.

Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com>
Reviewed-by: Chanwoo Choi <cw00.choi@samsung.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Gaël PORTAY <gael.portay@collabora.com>
Acked-by: MyungJoo Ham <myungjoo.ham@samsung.com>
Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com>
This commit is contained in:
Enric Balletbo i Serra 2020-07-09 11:05:29 +02:00 committed by Chanwoo Choi
parent 24948479be
commit ed27952975
1 changed files with 2 additions and 0 deletions
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Documentation/devicetree/bindings/devfreq/rk3399_dmc.txt
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@ -18,6 +18,8 @@ Optional properties:
format depends on the interrupt controller.
It should be a DCF interrupt. When DDR DVFS finishes
a DCF interrupt is triggered.
- rockchip,pmu: Phandle to the syscon managing the "PMU general register
files".
Following properties relate to DDR timing: