forked from luck/tmp_suning_uos_patched
ACPI: PMIC: Fix intel_pmic_regs_handler() read accesses
[ Upstream commit 009a789443fe4c8e6b1ecb7c16b4865c026184cd ]
The handling of PMIC register reads through writing 0 to address 4
of the OpRegion is wrong. Instead of returning the read value
through the value64, which is a no-op for function == ACPI_WRITE calls,
store the value and then on a subsequent function == ACPI_READ with
address == 3 (the address for the value field of the OpRegion)
return the stored value.
This has been tested on a Xiaomi Mi Pad 2 and makes the ACPI battery dev
there mostly functional (unfortunately there are still other issues).
Here are the SET() / GET() functions of the PMIC ACPI device,
which use this OpRegion, which clearly show the new behavior to
be correct:
OperationRegion (REGS, 0x8F, Zero, 0x50)
Field (REGS, ByteAcc, NoLock, Preserve)
{
CLNT, 8,
SA, 8,
OFF, 8,
VAL, 8,
RWM, 8
}
Method (GET, 3, Serialized)
{
If ((AVBE == One))
{
CLNT = Arg0
SA = Arg1
OFF = Arg2
RWM = Zero
If ((AVBG == One))
{
GPRW = Zero
}
}
Return (VAL) /* \_SB_.PCI0.I2C7.PMI5.VAL_ */
}
Method (SET, 4, Serialized)
{
If ((AVBE == One))
{
CLNT = Arg0
SA = Arg1
OFF = Arg2
VAL = Arg3
RWM = One
If ((AVBG == One))
{
GPRW = One
}
}
}
Fixes: 0afa877a56
("ACPI / PMIC: intel: add REGS operation region support")
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
Signed-off-by: Sasha Levin <sashal@kernel.org>
This commit is contained in:
parent
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@ -211,31 +211,36 @@ static acpi_status intel_pmic_regs_handler(u32 function,
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void *handler_context, void *region_context)
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{
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struct intel_pmic_opregion *opregion = region_context;
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int result = 0;
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int result = -EINVAL;
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switch (address) {
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case 0:
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return AE_OK;
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case 1:
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opregion->ctx.addr |= (*value64 & 0xff) << 8;
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return AE_OK;
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case 2:
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opregion->ctx.addr |= *value64 & 0xff;
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return AE_OK;
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case 3:
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opregion->ctx.val = *value64 & 0xff;
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return AE_OK;
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case 4:
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if (*value64) {
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result = regmap_write(opregion->regmap, opregion->ctx.addr,
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opregion->ctx.val);
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} else {
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result = regmap_read(opregion->regmap, opregion->ctx.addr,
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&opregion->ctx.val);
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if (result == 0)
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*value64 = opregion->ctx.val;
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if (function == ACPI_WRITE) {
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switch (address) {
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case 0:
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return AE_OK;
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case 1:
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opregion->ctx.addr |= (*value64 & 0xff) << 8;
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return AE_OK;
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case 2:
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opregion->ctx.addr |= *value64 & 0xff;
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return AE_OK;
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case 3:
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opregion->ctx.val = *value64 & 0xff;
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return AE_OK;
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case 4:
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if (*value64) {
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result = regmap_write(opregion->regmap, opregion->ctx.addr,
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opregion->ctx.val);
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} else {
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result = regmap_read(opregion->regmap, opregion->ctx.addr,
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&opregion->ctx.val);
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}
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opregion->ctx.addr = 0;
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}
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memset(&opregion->ctx, 0x00, sizeof(opregion->ctx));
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}
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if (function == ACPI_READ && address == 3) {
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*value64 = opregion->ctx.val;
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return AE_OK;
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}
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if (result < 0) {
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