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Merge branch 'v3.8-samsung-fixes-1' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung into fixes

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From Kukjin Kim:

Here is Samsung fixes-1 for v3.8-rc1.
Most of them are trivial fixes which are for NULL pointer dereference, MSHC
clocks instance names and exynos5440 stuff.

* 'v3.8-samsung-fixes-1' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung:
  ARM: EXYNOS: Fix MSHC clocks instance names
  ARM: EXYNOS: Fix NULL pointer dereference bug in SMDKV310
  ARM: EXYNOS: Fix NULL pointer dereference bug in SMDK4X12
  ARM: EXYNOS: Fix NULL pointer dereference bug in Origen
  ARM: SAMSUNG: Add missing include guard to gpio-core.h
  pinctrl: exynos5440/samsung: Staticize pcfgs
  pinctrl: samsung: Fix a typo in pinctrl-samsung.h
  ARM: EXYNOS: fix skip scu_enable() for EXYNOS5440
  ARM: EXYNOS: fix GIC using for EXYNOS5440
  ARM: EXYNOS: fix build error when MFC is not selected

Signed-off-by: Olof Johansson <olof@lixom.net>
This commit is contained in:
Olof Johansson 2012-12-20 08:04:48 -08:00
commit f2420ec2d0
11 changed files with 21 additions and 13 deletions
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4
arch/arm/mach-exynos/clock-exynos4.c
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@ -529,7 +529,7 @@ static struct clk exynos4_init_clocks_off[] = {
.enable = exynos4_clk_ip_fsys_ctrl,
.ctrlbit = (1 << 8),
}, {
.name = "dwmmc",
.name = "biu",
.parent = &exynos4_clk_aclk_133.clk,
.enable = exynos4_clk_ip_fsys_ctrl,
.ctrlbit = (1 << 9),
@ -1134,7 +1134,7 @@ static struct clksrc_clk exynos4_clksrcs[] = {
.reg_div = { .reg = EXYNOS4_CLKDIV_MFC, .shift = 0, .size = 4 },
}, {
.clk = {
.name = "sclk_dwmmc",
.name = "ciu",
.parent = &exynos4_clk_dout_mmc4.clk,
.enable = exynos4_clksrc_mask_fsys_ctrl,
.ctrlbit = (1 << 16),

3
arch/arm/mach-exynos/common.c
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@ -679,7 +679,8 @@ void __init exynos5_init_irq(void)
* Theses parameters should be NULL and 0 because EXYNOS4
* uses GIC instead of VIC.
*/
s5p_init_irq(NULL, 0);
if (!of_machine_is_compatible("samsung,exynos5440"))
s5p_init_irq(NULL, 0);
gic_arch_extn.irq_set_wake = s3c_irq_wake;
}

2
arch/arm/mach-exynos/mach-exynos5-dt.c
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@ -163,6 +163,7 @@ static char const *exynos5_dt_compat[] __initdata = {
static void __init exynos5_reserve(void)
{
#ifdef CONFIG_S5P_DEV_MFC
struct s5p_mfc_dt_meminfo mfc_mem;
/* Reserve memory for MFC only if it's available */
@ -170,6 +171,7 @@ static void __init exynos5_reserve(void)
if (of_scan_flat_dt(s5p_fdt_find_mfc_mem, &mfc_mem))
s5p_mfc_reserve_mem(mfc_mem.roff, mfc_mem.rsize, mfc_mem.loff,
mfc_mem.lsize);
#endif
}
DT_MACHINE_START(EXYNOS5_DT, "SAMSUNG EXYNOS5 (Flattened Device Tree)")

4
arch/arm/mach-exynos/mach-origen.c
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@ -621,7 +621,7 @@ static struct pwm_lookup origen_pwm_lookup[] = {
PWM_LOOKUP("s3c24xx-pwm.0", 0, "pwm-backlight.0", NULL),
};
#ifdef CONFIG_DRM_EXYNOS
#ifdef CONFIG_DRM_EXYNOS_FIMD
static struct exynos_drm_fimd_pdata drm_fimd_pdata = {
.panel = {
.timing = {
@ -793,7 +793,7 @@ static void __init origen_machine_init(void)
s5p_i2c_hdmiphy_set_platdata(NULL);
s5p_hdmi_set_platdata(&hdmiphy_info, NULL, 0);
#ifdef CONFIG_DRM_EXYNOS
#ifdef CONFIG_DRM_EXYNOS_FIMD
s5p_device_fimd0.dev.platform_data = &drm_fimd_pdata;
exynos4_fimd0_gpio_setup_24bpp();
#else

4
arch/arm/mach-exynos/mach-smdk4x12.c
View File

@ -246,7 +246,7 @@ static struct samsung_keypad_platdata smdk4x12_keypad_data __initdata = {
.cols = 8,
};
#ifdef CONFIG_DRM_EXYNOS
#ifdef CONFIG_DRM_EXYNOS_FIMD
static struct exynos_drm_fimd_pdata drm_fimd_pdata = {
.panel = {
.timing = {
@ -360,7 +360,7 @@ static void __init smdk4x12_machine_init(void)
s3c_hsotg_set_platdata(&smdk4x12_hsotg_pdata);
#ifdef CONFIG_DRM_EXYNOS
#ifdef CONFIG_DRM_EXYNOS_FIMD
s5p_device_fimd0.dev.platform_data = &drm_fimd_pdata;
exynos4_fimd0_gpio_setup_24bpp();
#else

4
arch/arm/mach-exynos/mach-smdkv310.c
View File

@ -159,7 +159,7 @@ static struct platform_device smdkv310_lcd_lte480wv = {
.dev.platform_data = &smdkv310_lcd_lte480wv_data,
};
#ifdef CONFIG_DRM_EXYNOS
#ifdef CONFIG_DRM_EXYNOS_FIMD
static struct exynos_drm_fimd_pdata drm_fimd_pdata = {
.panel = {
.timing = {
@ -402,7 +402,7 @@ static void __init smdkv310_machine_init(void)
samsung_bl_set(&smdkv310_bl_gpio_info, &smdkv310_bl_data);
pwm_add_table(smdkv310_pwm_lookup, ARRAY_SIZE(smdkv310_pwm_lookup));
#ifdef CONFIG_DRM_EXYNOS
#ifdef CONFIG_DRM_EXYNOS_FIMD
s5p_device_fimd0.dev.platform_data = &drm_fimd_pdata;
exynos4_fimd0_gpio_setup_24bpp();
#else

2
arch/arm/mach-exynos/platsmp.c
View File

@ -198,7 +198,7 @@ static void __init exynos_smp_prepare_cpus(unsigned int max_cpus)
{
int i;
if (!soc_is_exynos5250())
if (!(soc_is_exynos5250() || soc_is_exynos5440()))
scu_enable(scu_base_addr());
/*

5
arch/arm/plat-samsung/include/plat/gpio-core.h
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@ -11,6 +11,9 @@
* published by the Free Software Foundation.
*/
#ifndef __PLAT_SAMSUNG_GPIO_CORE_H
#define __PLAT_SAMSUNG_GPIO_CORE_H
#define GPIOCON_OFF (0x00)
#define GPIODAT_OFF (0x04)
@ -124,3 +127,5 @@ extern struct samsung_gpio_pm samsung_gpio_pm_4bit;
/* locking wrappers to deal with multiple access to the same gpio bank */
#define samsung_gpio_lock(_oc, _fl) spin_lock_irqsave(&(_oc)->lock, _fl)
#define samsung_gpio_unlock(_oc, _fl) spin_unlock_irqrestore(&(_oc)->lock, _fl)
#endif /* __PLAT_SAMSUNG_GPIO_CORE_H */

2
drivers/pinctrl/pinctrl-exynos5440.c
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@ -117,7 +117,7 @@ struct exynos5440_pinctrl_priv_data {
};
/* list of all possible config options supported */
struct pin_config {
static struct pin_config {
char *prop_cfg;
unsigned int cfg_type;
} pcfgs[] = {

2
drivers/pinctrl/pinctrl-samsung.c
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@ -37,7 +37,7 @@
#define FSUFFIX_LEN sizeof(FUNCTION_SUFFIX)
/* list of all possible config options supported */
struct pin_config {
static struct pin_config {
char *prop_cfg;
unsigned int cfg_type;
} pcfgs[] = {

2
drivers/pinctrl/pinctrl-samsung.h
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@ -104,7 +104,7 @@ struct samsung_pinctrl_drv_data;
/**
* struct samsung_pin_bank: represent a controller pin-bank.
* @reg_offset: starting offset of the pin-bank registers.
* @pctl_offset: starting offset of the pin-bank registers.
* @pin_base: starting pin number of the bank.
* @nr_pins: number of pins included in this bank.
* @func_width: width of the function selector bit field.