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ARM: PRIMA2: irq: make prima2 irq can work even we enable GIC for Marco

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in Marco, we will use GIC. this patch prepares the handle_irq for prima2
to avoid the compiling errors since we want only one defconfig and zImage
for both prima2 and marco that means we will need handle_irq for both.

Signed-off-by: Baohua Song <Baohua.Song@csr.com>
This commit is contained in:
Barry Song 2012-12-20 19:11:18 +08:00 committed by Barry Song
parent 598548facd
commit f2a94192d9
4 changed files with 21 additions and 4 deletions
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3
arch/arm/mach-prima2/common.c
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@ -41,6 +41,9 @@ DT_MACHINE_START(PRIMA2_DT, "Generic PRIMA2 (Flattened Device Tree)")
.map_io = sirfsoc_map_lluart,
.init_irq = sirfsoc_of_irq_init,
.init_time = sirfsoc_prima2_timer_init,
#ifdef CONFIG_MULTI_IRQ_HANDLER
.handle_irq = sirfsoc_handle_irq,
#endif
.dma_zone_size = SZ_256M,
.init_machine = sirfsoc_mach_init,
.init_late = sirfsoc_init_late,

2
arch/arm/mach-prima2/common.h
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@ -11,12 +11,14 @@
#include <linux/init.h>
#include <asm/mach/time.h>
#include <asm/exception.h>
extern void sirfsoc_prima2_timer_init(void);
extern void __init sirfsoc_of_irq_init(void);
extern void __init sirfsoc_of_clk_init(void);
extern void sirfsoc_restart(char, const char *);
extern asmlinkage void __exception_irq_entry sirfsoc_handle_irq(struct pt_regs *regs);
#ifndef CONFIG_DEBUG_LL
static inline void sirfsoc_map_lluart(void) {}

4
arch/arm/mach-prima2/include/mach/irqs.h
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@ -10,8 +10,8 @@
#define __ASM_ARCH_IRQS_H
#define SIRFSOC_INTENAL_IRQ_START 0
#define SIRFSOC_INTENAL_IRQ_END 59
#define SIRFSOC_INTENAL_IRQ_END 127
#define SIRFSOC_GPIO_IRQ_START (SIRFSOC_INTENAL_IRQ_END + 1)
#define NR_IRQS 220
#define NR_IRQS 288
#endif

16
arch/arm/mach-prima2/irq.c
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@ -9,17 +9,19 @@
#include <linux/init.h>
#include <linux/io.h>
#include <linux/irq.h>
#include <mach/hardware.h>
#include <asm/mach/irq.h>
#include <linux/of.h>
#include <linux/of_address.h>
#include <linux/irqdomain.h>
#include <linux/syscore_ops.h>
#include <asm/mach/irq.h>
#include <asm/exception.h>
#include <mach/hardware.h>
#define SIRFSOC_INT_RISC_MASK0 0x0018
#define SIRFSOC_INT_RISC_MASK1 0x001C
#define SIRFSOC_INT_RISC_LEVEL0 0x0020
#define SIRFSOC_INT_RISC_LEVEL1 0x0024
#define SIRFSOC_INIT_IRQ_ID 0x0038
void __iomem *sirfsoc_intc_base;
@ -52,6 +54,16 @@ static __init void sirfsoc_irq_init(void)
writel_relaxed(0, sirfsoc_intc_base + SIRFSOC_INT_RISC_MASK1);
}
asmlinkage void __exception_irq_entry sirfsoc_handle_irq(struct pt_regs *regs)
{
u32 irqstat, irqnr;
irqstat = readl_relaxed(sirfsoc_intc_base + SIRFSOC_INIT_IRQ_ID);
irqnr = irqstat & 0xff;
handle_IRQ(irqnr, regs);
}
static struct of_device_id intc_ids[] = {
{ .compatible = "sirf,prima2-intc" },
{},