forked from luck/tmp_suning_uos_patched
iio:ad5064: Add AD5625/AD5627/AD5645/AD5647/AD4665/AD5657 support
The AD5625/AD5645/AD5665 are a family of 4 channel DACs with 12-bit, 14-bit and 16-bit precision respectively. The devices come in 3 flavors in terms of built-in reference, either no built-in reference, built-in 1.25V reference or built-in 2.5V reference. The AD5627/AD5647/AD5667 are similar to the AD5625/AD5645/AD5665 except that they have 2 instead of 4 channels. While these new devices are mostly register map compatible with the existing devices support by the driver some offsets and register addresses have been shuffled around. To accommodate this introduce a new register map layout. For the lack of a better name we will just call it version 2. Datasheets: http://www.analog.com/media/en/technical-documentation/data-sheets/AD5625R_5645R_5665R_5625_5665.pdf http://www.analog.com/media/en/technical-documentation/data-sheets/AD5627R_5647R_5667R_5627_5667.pdf Signed-off-by: Lars-Peter Clausen <lars@metafoo.de> Signed-off-by: Jonathan Cameron <jic23@kernel.org>
This commit is contained in:
Lars-Peter Clausen
Jonathan Cameron
parent
4946ff5858
commit
f47732c0da
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@ -10,9 +10,10 @@ config AD5064
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depends on (SPI_MASTER && I2C!=m) || I2C
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help
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Say yes here to build support for Analog Devices AD5024, AD5025, AD5044,
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AD5045, AD5064, AD5064-1, AD5065, AD5628, AD5629R, AD5648, AD5666, AD5668,
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AD5669R, LTC2606, LTC2607, LTC2609, LTC2616, LTC2617, LTC2619, LTC2626,
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LTC2627, LTC2629 Digital to Analog Converter.
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AD5045, AD5064, AD5064-1, AD5065, AD5625, AD5625R, AD5627, AD5627R,
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AD5628, AD5629R, AD5645R, AD5647R, AD5648, AD5665, AD5665R, AD5666,
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AD5667, AD5667R, AD5668, AD5669R, LTC2606, LTC2607, LTC2609, LTC2616,
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LTC2617, LTC2619, LTC2626, LTC2627, LTC2629 Digital to Analog Converter.
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To compile this driver as a module, choose M here: the
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module will be called ad5064.
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@ -1,6 +1,7 @@
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/*
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* AD5024, AD5025, AD5044, AD5045, AD5064, AD5064-1, AD5065, AD5628, AD5629R,
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* AD5648, AD5666, AD5668, AD5669R, LTC2606, LTC2607, LTC2609, LTC2616,
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* AD5024, AD5025, AD5044, AD5045, AD5064, AD5064-1, AD5065, AD5625, AD5625R,
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* AD5627, AD5627R, AD5628, AD5629R, AD5645R, AD5647R, AD5648, AD5665, AD5665R,
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* AD5666, AD5667, AD5667R, AD5668, AD5669R, LTC2606, LTC2607, LTC2609, LTC2616,
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* LTC2617, LTC2619, LTC2626, LTC2627, LTC2629 Digital to analog converters
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* driver
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*
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@ -41,6 +42,9 @@
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#define AD5064_CMD_RESET 0x7
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#define AD5064_CMD_CONFIG 0x8
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#define AD5064_CMD_RESET_V2 0x5
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#define AD5064_CMD_CONFIG_V2 0x7
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#define AD5064_CONFIG_DAISY_CHAIN_ENABLE BIT(1)
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#define AD5064_CONFIG_INT_VREF_ENABLE BIT(0)
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@ -51,11 +55,13 @@
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/**
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* enum ad5064_regmap_type - Register layout variant
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* @AD5064_REGMAP_ADI: Analog Devices register map layout
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* @AD5064_REGMAP_ADI: Old Analog Devices register map layout
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* @AD5064_REGMAP_ADI2: New Analog Devices register map layout
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* @AD5064_REGMAP_LTC: LTC register map layout
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*/
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enum ad5064_regmap_type {
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AD5064_REGMAP_ADI,
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AD5064_REGMAP_ADI2,
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AD5064_REGMAP_LTC,
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};
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@ -125,14 +131,30 @@ enum ad5064_type {
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ID_AD5064,
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ID_AD5064_1,
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ID_AD5065,
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ID_AD5625,
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ID_AD5625R_1V25,
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ID_AD5625R_2V5,
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ID_AD5627,
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ID_AD5627R_1V25,
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ID_AD5627R_2V5,
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ID_AD5628_1,
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ID_AD5628_2,
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ID_AD5629_1,
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ID_AD5629_2,
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ID_AD5645R_1V25,
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ID_AD5645R_2V5,
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ID_AD5647R_1V25,
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ID_AD5647R_2V5,
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ID_AD5648_1,
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ID_AD5648_2,
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ID_AD5665,
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ID_AD5665R_1V25,
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ID_AD5665R_2V5,
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ID_AD5666_1,
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ID_AD5666_2,
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ID_AD5667,
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ID_AD5667R_1V25,
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ID_AD5667R_2V5,
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ID_AD5668_1,
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ID_AD5668_2,
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ID_AD5669_1,
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@ -160,17 +182,23 @@ static int ad5064_sync_powerdown_mode(struct ad5064_state *st,
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const struct iio_chan_spec *chan)
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{
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unsigned int val, address;
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unsigned int shift;
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int ret;
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if (st->chip_info->regmap_type == AD5064_REGMAP_LTC) {
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val = 0;
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address = chan->address;
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} else {
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address = 0;
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if (st->chip_info->regmap_type == AD5064_REGMAP_ADI2)
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shift = 4;
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else
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shift = 8;
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val = (0x1 << chan->address);
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address = 0;
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if (st->pwr_down[chan->channel])
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val |= st->pwr_down_mode[chan->channel] << 8;
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val |= st->pwr_down_mode[chan->channel] << shift;
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}
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ret = ad5064_write(st, AD5064_CMD_POWERDOWN_DAC, address, val, 0);
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@ -391,6 +419,7 @@ static DECLARE_AD5065_CHANNELS(ad5045_channels, 14, 6, ad5064_ext_info);
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static DECLARE_AD5065_CHANNELS(ad5065_channels, 16, 4, ad5064_ext_info);
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static DECLARE_AD5064_CHANNELS(ad5629_channels, 12, 4, ad5064_ext_info);
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static DECLARE_AD5064_CHANNELS(ad5645_channels, 14, 2, ad5064_ext_info);
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static DECLARE_AD5064_CHANNELS(ad5669_channels, 16, 0, ad5064_ext_info);
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static DECLARE_AD5064_CHANNELS(ltc2607_channels, 16, 0, ltc2617_ext_info);
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@ -440,6 +469,46 @@ static const struct ad5064_chip_info ad5064_chip_info_tbl[] = {
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.num_channels = 2,
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.regmap_type = AD5064_REGMAP_ADI,
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},
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[ID_AD5625] = {
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.shared_vref = true,
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.channels = ad5629_channels,
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.num_channels = 4,
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.regmap_type = AD5064_REGMAP_ADI2
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},
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[ID_AD5625R_1V25] = {
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.shared_vref = true,
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.internal_vref = 1250000,
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.channels = ad5629_channels,
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.num_channels = 4,
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.regmap_type = AD5064_REGMAP_ADI2
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},
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[ID_AD5625R_2V5] = {
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.shared_vref = true,
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.internal_vref = 2500000,
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.channels = ad5629_channels,
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.num_channels = 4,
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.regmap_type = AD5064_REGMAP_ADI2
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},
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[ID_AD5627] = {
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.shared_vref = true,
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.channels = ad5629_channels,
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.num_channels = 2,
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.regmap_type = AD5064_REGMAP_ADI2
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},
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[ID_AD5627R_1V25] = {
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.shared_vref = true,
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.internal_vref = 1250000,
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.channels = ad5629_channels,
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.num_channels = 2,
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.regmap_type = AD5064_REGMAP_ADI2
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},
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[ID_AD5627R_2V5] = {
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.shared_vref = true,
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.internal_vref = 2500000,
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.channels = ad5629_channels,
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.num_channels = 2,
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.regmap_type = AD5064_REGMAP_ADI2
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},
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[ID_AD5628_1] = {
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.shared_vref = true,
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.internal_vref = 2500000,
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@ -468,6 +537,34 @@ static const struct ad5064_chip_info ad5064_chip_info_tbl[] = {
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.num_channels = 8,
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.regmap_type = AD5064_REGMAP_ADI,
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},
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[ID_AD5645R_1V25] = {
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.shared_vref = true,
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.internal_vref = 1250000,
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.channels = ad5645_channels,
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.num_channels = 4,
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.regmap_type = AD5064_REGMAP_ADI2
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},
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[ID_AD5645R_2V5] = {
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.shared_vref = true,
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.internal_vref = 2500000,
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.channels = ad5645_channels,
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.num_channels = 4,
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.regmap_type = AD5064_REGMAP_ADI2
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},
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[ID_AD5647R_1V25] = {
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.shared_vref = true,
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.internal_vref = 1250000,
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.channels = ad5645_channels,
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.num_channels = 2,
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.regmap_type = AD5064_REGMAP_ADI2
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},
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[ID_AD5647R_2V5] = {
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.shared_vref = true,
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.internal_vref = 2500000,
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.channels = ad5645_channels,
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.num_channels = 2,
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.regmap_type = AD5064_REGMAP_ADI2
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},
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[ID_AD5648_1] = {
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.shared_vref = true,
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.internal_vref = 2500000,
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@ -482,6 +579,26 @@ static const struct ad5064_chip_info ad5064_chip_info_tbl[] = {
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.num_channels = 8,
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.regmap_type = AD5064_REGMAP_ADI,
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},
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[ID_AD5665] = {
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.shared_vref = true,
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.channels = ad5669_channels,
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.num_channels = 4,
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.regmap_type = AD5064_REGMAP_ADI2
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},
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[ID_AD5665R_1V25] = {
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.shared_vref = true,
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.internal_vref = 1250000,
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.channels = ad5669_channels,
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.num_channels = 4,
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.regmap_type = AD5064_REGMAP_ADI2
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},
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[ID_AD5665R_2V5] = {
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.shared_vref = true,
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.internal_vref = 2500000,
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.channels = ad5669_channels,
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.num_channels = 4,
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.regmap_type = AD5064_REGMAP_ADI2
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},
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[ID_AD5666_1] = {
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.shared_vref = true,
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.internal_vref = 2500000,
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@ -496,6 +613,26 @@ static const struct ad5064_chip_info ad5064_chip_info_tbl[] = {
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.num_channels = 4,
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.regmap_type = AD5064_REGMAP_ADI,
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},
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[ID_AD5667] = {
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.shared_vref = true,
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.channels = ad5669_channels,
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.num_channels = 2,
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.regmap_type = AD5064_REGMAP_ADI2
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},
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[ID_AD5667R_1V25] = {
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.shared_vref = true,
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.internal_vref = 1250000,
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.channels = ad5669_channels,
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.num_channels = 2,
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.regmap_type = AD5064_REGMAP_ADI2
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},
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[ID_AD5667R_2V5] = {
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.shared_vref = true,
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.internal_vref = 2500000,
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.channels = ad5669_channels,
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.num_channels = 2,
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.regmap_type = AD5064_REGMAP_ADI2
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},
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[ID_AD5668_1] = {
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.shared_vref = true,
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.internal_vref = 2500000,
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@ -607,6 +744,22 @@ static const char * const ad5064_vref_name(struct ad5064_state *st,
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return st->chip_info->shared_vref ? "vref" : ad5064_vref_names[vref];
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}
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static int ad5064_set_config(struct ad5064_state *st, unsigned int val)
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{
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unsigned int cmd;
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switch (st->chip_info->regmap_type) {
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case AD5064_REGMAP_ADI2:
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cmd = AD5064_CMD_CONFIG_V2;
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break;
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default:
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cmd = AD5064_CMD_CONFIG;
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break;
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}
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return ad5064_write(st, cmd, 0, val, 0);
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}
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static int ad5064_probe(struct device *dev, enum ad5064_type type,
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const char *name, ad5064_write_func write)
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{
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@ -636,8 +789,7 @@ static int ad5064_probe(struct device *dev, enum ad5064_type type,
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if (!st->chip_info->internal_vref)
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return ret;
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st->use_internal_vref = true;
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ret = ad5064_write(st, AD5064_CMD_CONFIG, 0,
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AD5064_CONFIG_INT_VREF_ENABLE, 0);
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ret = ad5064_set_config(st, AD5064_CONFIG_INT_VREF_ENABLE);
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if (ret) {
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dev_err(dev, "Failed to enable internal vref: %d\n",
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ret);
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@ -766,9 +918,19 @@ static int ad5064_i2c_write(struct ad5064_state *st, unsigned int cmd,
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unsigned int addr, unsigned int val)
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{
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struct i2c_client *i2c = to_i2c_client(st->dev);
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unsigned int cmd_shift;
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int ret;
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st->data.i2c[0] = (cmd << 4) | addr;
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switch (st->chip_info->regmap_type) {
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case AD5064_REGMAP_ADI2:
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cmd_shift = 3;
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break;
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default:
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cmd_shift = 4;
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break;
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}
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st->data.i2c[0] = (cmd << cmd_shift) | addr;
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put_unaligned_be16(val, &st->data.i2c[1]);
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ret = i2c_master_send(i2c, st->data.i2c, 3);
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@ -791,9 +953,23 @@ static int ad5064_i2c_remove(struct i2c_client *i2c)
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}
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static const struct i2c_device_id ad5064_i2c_ids[] = {
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{"ad5625", ID_AD5625 },
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{"ad5625r-1v25", ID_AD5625R_1V25 },
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{"ad5625r-2v5", ID_AD5625R_2V5 },
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{"ad5627", ID_AD5627 },
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{"ad5627r-1v25", ID_AD5627R_1V25 },
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{"ad5627r-2v5", ID_AD5627R_2V5 },
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{"ad5629-1", ID_AD5629_1},
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{"ad5629-2", ID_AD5629_2},
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{"ad5629-3", ID_AD5629_2}, /* similar enough to ad5629-2 */
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{"ad5645r-1v25", ID_AD5645R_1V25 },
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{"ad5645r-2v5", ID_AD5645R_2V5 },
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{"ad5665", ID_AD5665 },
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{"ad5665r-1v25", ID_AD5665R_1V25 },
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{"ad5665r-2v5", ID_AD5665R_2V5 },
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{"ad5667", ID_AD5667 },
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{"ad5667r-1v25", ID_AD5667R_1V25 },
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{"ad5667r-2v5", ID_AD5667R_2V5 },
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{"ad5669-1", ID_AD5669_1},
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{"ad5669-2", ID_AD5669_2},
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{"ad5669-3", ID_AD5669_2}, /* similar enough to ad5669-2 */
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