forked from luck/tmp_suning_uos_patched
OpenRISC updates for 3.5
A couple of cleanups for the OpenRISC architecture: * Implement IRQ domains * Use DMA mapping framework completely and catch up with recent changes to dma_map_ops * One bug fix to the "or1k_atomic" syscall to not clobber call-saved registers * OOM killer patches to the pagefault handler ported from the X86 arch * ...and a couple of header file cleanups -----BEGIN PGP SIGNATURE----- Version: GnuPG v1.4.11 (GNU/Linux) iEYEABECAAYFAk+6o7MACgkQ70gcjN2673OpcACeIwRxhw1ZgtgMSLcR2/t8Twsn Ct0AoMDLvEW7BW+5E7ZgaAlIwNkGmcZQ =TG1P -----END PGP SIGNATURE----- Merge tag 'for-3.5' of git://openrisc.net/jonas/linux Pull OpenRISC updates from Jonas Bonn: "A couple of cleanups for the OpenRISC architecture: - Implement IRQ domains - Use DMA mapping framework completely and catch up with recent changes to dma_map_ops - One bug fix to the "or1k_atomic" syscall to not clobber call-saved registers - OOM killer patches to the pagefault handler ported from the X86 arch - ...and a couple of header file cleanups" * tag 'for-3.5' of git://openrisc.net/jonas/linux: openrisc: use scratch regs in atomic syscall openrisc: provide dma_map_ops openrisc: header file cleanups openrisc/mm/fault.c: Port OOM changes to do_page_fault openrisc: remove unnecessary includes openrisc: implement irqdomains
This commit is contained in:
commit
f4c16c5817
@ -7,6 +7,7 @@ config OPENRISC
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def_bool y
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select OF
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select OF_EARLY_FLATTREE
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select IRQ_DOMAIN
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select HAVE_MEMBLOCK
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select ARCH_WANT_OPTIONAL_GPIOLIB
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select HAVE_ARCH_TRACEHOOK
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@ -1,6 +1,7 @@
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include include/asm-generic/Kbuild.asm
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header-y += spr_defs.h
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header-y += elf.h
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header-y += ucontext.h
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generic-y += atomic.h
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generic-y += auxvec.h
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@ -20,150 +20,71 @@
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/*
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* See Documentation/DMA-API-HOWTO.txt and
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* Documentation/DMA-API.txt for documentation.
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*
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* This file is written with the intention of eventually moving over
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* to largely using asm-generic/dma-mapping-common.h in its place.
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*/
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#include <linux/dma-debug.h>
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#include <asm-generic/dma-coherent.h>
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#include <linux/kmemcheck.h>
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#include <linux/dma-mapping.h>
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#define DMA_ERROR_CODE (~(dma_addr_t)0x0)
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extern struct dma_map_ops or1k_dma_map_ops;
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#define dma_alloc_noncoherent(d, s, h, f) dma_alloc_coherent(d, s, h, f)
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#define dma_free_noncoherent(d, s, v, h) dma_free_coherent(d, s, v, h)
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void *or1k_dma_alloc_coherent(struct device *dev, size_t size,
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dma_addr_t *dma_handle, gfp_t flag);
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void or1k_dma_free_coherent(struct device *dev, size_t size, void *vaddr,
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dma_addr_t dma_handle);
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dma_addr_t or1k_map_page(struct device *dev, struct page *page,
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unsigned long offset, size_t size,
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enum dma_data_direction dir,
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struct dma_attrs *attrs);
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void or1k_unmap_page(struct device *dev, dma_addr_t dma_handle,
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size_t size, enum dma_data_direction dir,
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struct dma_attrs *attrs);
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int or1k_map_sg(struct device *dev, struct scatterlist *sg,
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int nents, enum dma_data_direction dir,
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struct dma_attrs *attrs);
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void or1k_unmap_sg(struct device *dev, struct scatterlist *sg,
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int nents, enum dma_data_direction dir,
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struct dma_attrs *attrs);
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void or1k_sync_single_for_cpu(struct device *dev,
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dma_addr_t dma_handle, size_t size,
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enum dma_data_direction dir);
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void or1k_sync_single_for_device(struct device *dev,
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dma_addr_t dma_handle, size_t size,
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enum dma_data_direction dir);
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static inline void *dma_alloc_coherent(struct device *dev, size_t size,
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dma_addr_t *dma_handle, gfp_t flag)
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static inline struct dma_map_ops *get_dma_ops(struct device *dev)
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{
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return &or1k_dma_map_ops;
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}
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#include <asm-generic/dma-mapping-common.h>
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#define dma_alloc_coherent(d,s,h,f) dma_alloc_attrs(d,s,h,f,NULL)
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static inline void *dma_alloc_attrs(struct device *dev, size_t size,
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dma_addr_t *dma_handle, gfp_t gfp,
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struct dma_attrs *attrs)
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{
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struct dma_map_ops *ops = get_dma_ops(dev);
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void *memory;
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memory = or1k_dma_alloc_coherent(dev, size, dma_handle, flag);
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memory = ops->alloc(dev, size, dma_handle, gfp, attrs);
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debug_dma_alloc_coherent(dev, size, *dma_handle, memory);
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return memory;
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}
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static inline void dma_free_coherent(struct device *dev, size_t size,
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void *cpu_addr, dma_addr_t dma_handle)
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#define dma_free_coherent(d,s,c,h) dma_free_attrs(d,s,c,h,NULL)
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static inline void dma_free_attrs(struct device *dev, size_t size,
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void *cpu_addr, dma_addr_t dma_handle,
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struct dma_attrs *attrs)
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{
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struct dma_map_ops *ops = get_dma_ops(dev);
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debug_dma_free_coherent(dev, size, cpu_addr, dma_handle);
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or1k_dma_free_coherent(dev, size, cpu_addr, dma_handle);
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ops->free(dev, size, cpu_addr, dma_handle, attrs);
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}
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static inline dma_addr_t dma_map_single(struct device *dev, void *ptr,
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size_t size,
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enum dma_data_direction dir)
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static inline void *dma_alloc_noncoherent(struct device *dev, size_t size,
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dma_addr_t *dma_handle, gfp_t gfp)
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{
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dma_addr_t addr;
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struct dma_attrs attrs;
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kmemcheck_mark_initialized(ptr, size);
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BUG_ON(!valid_dma_direction(dir));
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addr = or1k_map_page(dev, virt_to_page(ptr),
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(unsigned long)ptr & ~PAGE_MASK, size,
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dir, NULL);
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debug_dma_map_page(dev, virt_to_page(ptr),
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(unsigned long)ptr & ~PAGE_MASK, size,
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dir, addr, true);
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return addr;
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dma_set_attr(DMA_ATTR_NON_CONSISTENT, &attrs);
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return dma_alloc_attrs(dev, size, dma_handle, gfp, &attrs);
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}
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static inline void dma_unmap_single(struct device *dev, dma_addr_t addr,
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size_t size,
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enum dma_data_direction dir)
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static inline void dma_free_noncoherent(struct device *dev, size_t size,
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void *cpu_addr, dma_addr_t dma_handle)
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{
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BUG_ON(!valid_dma_direction(dir));
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or1k_unmap_page(dev, addr, size, dir, NULL);
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debug_dma_unmap_page(dev, addr, size, dir, true);
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}
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struct dma_attrs attrs;
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static inline int dma_map_sg(struct device *dev, struct scatterlist *sg,
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int nents, enum dma_data_direction dir)
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{
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int i, ents;
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struct scatterlist *s;
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dma_set_attr(DMA_ATTR_NON_CONSISTENT, &attrs);
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for_each_sg(sg, s, nents, i)
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kmemcheck_mark_initialized(sg_virt(s), s->length);
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BUG_ON(!valid_dma_direction(dir));
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ents = or1k_map_sg(dev, sg, nents, dir, NULL);
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debug_dma_map_sg(dev, sg, nents, ents, dir);
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return ents;
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}
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static inline void dma_unmap_sg(struct device *dev, struct scatterlist *sg,
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int nents, enum dma_data_direction dir)
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{
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BUG_ON(!valid_dma_direction(dir));
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debug_dma_unmap_sg(dev, sg, nents, dir);
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or1k_unmap_sg(dev, sg, nents, dir, NULL);
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}
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static inline dma_addr_t dma_map_page(struct device *dev, struct page *page,
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size_t offset, size_t size,
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enum dma_data_direction dir)
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{
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dma_addr_t addr;
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kmemcheck_mark_initialized(page_address(page) + offset, size);
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BUG_ON(!valid_dma_direction(dir));
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addr = or1k_map_page(dev, page, offset, size, dir, NULL);
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debug_dma_map_page(dev, page, offset, size, dir, addr, false);
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return addr;
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}
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static inline void dma_unmap_page(struct device *dev, dma_addr_t addr,
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size_t size, enum dma_data_direction dir)
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{
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BUG_ON(!valid_dma_direction(dir));
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or1k_unmap_page(dev, addr, size, dir, NULL);
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debug_dma_unmap_page(dev, addr, size, dir, true);
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}
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static inline void dma_sync_single_for_cpu(struct device *dev, dma_addr_t addr,
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size_t size,
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enum dma_data_direction dir)
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{
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BUG_ON(!valid_dma_direction(dir));
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or1k_sync_single_for_cpu(dev, addr, size, dir);
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debug_dma_sync_single_for_cpu(dev, addr, size, dir);
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}
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static inline void dma_sync_single_for_device(struct device *dev,
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dma_addr_t addr, size_t size,
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enum dma_data_direction dir)
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{
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BUG_ON(!valid_dma_direction(dir));
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or1k_sync_single_for_device(dev, addr, size, dir);
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debug_dma_sync_single_for_device(dev, addr, size, dir);
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dma_free_attrs(dev, size, cpu_addr, dma_handle, &attrs);
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}
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static inline int dma_supported(struct device *dev, u64 dma_mask)
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|
@ -19,12 +19,18 @@
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#ifndef __ASM_OPENRISC_ELF_H
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#define __ASM_OPENRISC_ELF_H
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/*
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* This files is partially exported to userspace. This allows us to keep
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* the ELF bits in one place which should assist in keeping the kernel and
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* userspace in sync.
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*/
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/*
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* ELF register definitions..
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*/
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#include <linux/types.h>
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#include <linux/ptrace.h>
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/* for struct user_regs_struct definition */
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#include <asm/ptrace.h>
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/* The OR1K relocation types... not all relevant for module loader */
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#define R_OR32_NONE 0
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@ -62,6 +68,8 @@ typedef unsigned long elf_fpregset_t;
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#ifdef __KERNEL__
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#include <linux/types.h>
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/*
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* This is used to ensure we don't load something for the wrong architecture.
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*/
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|
@ -19,8 +19,6 @@
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#ifndef __ASM_OPENRISC_PTRACE_H
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#define __ASM_OPENRISC_PTRACE_H
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#include <asm/spr_defs.h>
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#ifndef __ASSEMBLY__
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/*
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* This is the layout of the regset returned by the GETREGSET ptrace call
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@ -30,13 +28,13 @@ struct user_regs_struct {
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unsigned long gpr[32];
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unsigned long pc;
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unsigned long sr;
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unsigned long pad1;
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unsigned long pad2;
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};
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#endif
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#ifdef __KERNEL__
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#include <asm/spr_defs.h>
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/*
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* Make kernel PTrace/register structures opaque to userspace... userspace can
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* access thread state via the regset mechanism. This allows us a bit of
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|
@ -21,13 +21,16 @@
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#include <linux/dma-mapping.h>
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#include <linux/dma-debug.h>
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#include <linux/export.h>
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#include <linux/dma-attrs.h>
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#include <asm/cpuinfo.h>
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#include <asm/spr_defs.h>
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#include <asm/tlbflush.h>
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static int page_set_nocache(pte_t *pte, unsigned long addr,
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unsigned long next, struct mm_walk *walk)
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static int
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page_set_nocache(pte_t *pte, unsigned long addr,
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unsigned long next, struct mm_walk *walk)
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{
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unsigned long cl;
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@ -46,8 +49,9 @@ static int page_set_nocache(pte_t *pte, unsigned long addr,
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return 0;
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}
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static int page_clear_nocache(pte_t *pte, unsigned long addr,
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unsigned long next, struct mm_walk *walk)
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static int
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page_clear_nocache(pte_t *pte, unsigned long addr,
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unsigned long next, struct mm_walk *walk)
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{
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pte_val(*pte) &= ~_PAGE_CI;
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@ -67,9 +71,19 @@ static int page_clear_nocache(pte_t *pte, unsigned long addr,
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* cache-inhibit bit on those pages, and makes sure that the pages are
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* flushed out of the cache before they are used.
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*
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* If the NON_CONSISTENT attribute is set, then this function just
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* returns "normal", cachable memory.
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||||
*
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* There are additional flags WEAK_ORDERING and WRITE_COMBINE to take
|
||||
* into consideration here, too. All current known implementations of
|
||||
* the OR1K support only strongly ordered memory accesses, so that flag
|
||||
* is being ignored for now; uncached but write-combined memory is a
|
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* missing feature of the OR1K.
|
||||
*/
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||||
void *or1k_dma_alloc_coherent(struct device *dev, size_t size,
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||||
dma_addr_t *dma_handle, gfp_t gfp)
|
||||
static void *
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||||
or1k_dma_alloc(struct device *dev, size_t size,
|
||||
dma_addr_t *dma_handle, gfp_t gfp,
|
||||
struct dma_attrs *attrs)
|
||||
{
|
||||
unsigned long va;
|
||||
void *page;
|
||||
@ -87,20 +101,23 @@ void *or1k_dma_alloc_coherent(struct device *dev, size_t size,
|
||||
|
||||
va = (unsigned long)page;
|
||||
|
||||
/*
|
||||
* We need to iterate through the pages, clearing the dcache for
|
||||
* them and setting the cache-inhibit bit.
|
||||
*/
|
||||
if (walk_page_range(va, va + size, &walk)) {
|
||||
free_pages_exact(page, size);
|
||||
return NULL;
|
||||
if (!dma_get_attr(DMA_ATTR_NON_CONSISTENT, attrs)) {
|
||||
/*
|
||||
* We need to iterate through the pages, clearing the dcache for
|
||||
* them and setting the cache-inhibit bit.
|
||||
*/
|
||||
if (walk_page_range(va, va + size, &walk)) {
|
||||
free_pages_exact(page, size);
|
||||
return NULL;
|
||||
}
|
||||
}
|
||||
|
||||
return (void *)va;
|
||||
}
|
||||
|
||||
void or1k_dma_free_coherent(struct device *dev, size_t size, void *vaddr,
|
||||
dma_addr_t dma_handle)
|
||||
static void
|
||||
or1k_dma_free(struct device *dev, size_t size, void *vaddr,
|
||||
dma_addr_t dma_handle, struct dma_attrs *attrs)
|
||||
{
|
||||
unsigned long va = (unsigned long)vaddr;
|
||||
struct mm_walk walk = {
|
||||
@ -108,16 +125,19 @@ void or1k_dma_free_coherent(struct device *dev, size_t size, void *vaddr,
|
||||
.mm = &init_mm
|
||||
};
|
||||
|
||||
/* walk_page_range shouldn't be able to fail here */
|
||||
WARN_ON(walk_page_range(va, va + size, &walk));
|
||||
if (!dma_get_attr(DMA_ATTR_NON_CONSISTENT, attrs)) {
|
||||
/* walk_page_range shouldn't be able to fail here */
|
||||
WARN_ON(walk_page_range(va, va + size, &walk));
|
||||
}
|
||||
|
||||
free_pages_exact(vaddr, size);
|
||||
}
|
||||
|
||||
dma_addr_t or1k_map_page(struct device *dev, struct page *page,
|
||||
unsigned long offset, size_t size,
|
||||
enum dma_data_direction dir,
|
||||
struct dma_attrs *attrs)
|
||||
static dma_addr_t
|
||||
or1k_map_page(struct device *dev, struct page *page,
|
||||
unsigned long offset, size_t size,
|
||||
enum dma_data_direction dir,
|
||||
struct dma_attrs *attrs)
|
||||
{
|
||||
unsigned long cl;
|
||||
dma_addr_t addr = page_to_phys(page) + offset;
|
||||
@ -147,16 +167,18 @@ dma_addr_t or1k_map_page(struct device *dev, struct page *page,
|
||||
return addr;
|
||||
}
|
||||
|
||||
void or1k_unmap_page(struct device *dev, dma_addr_t dma_handle,
|
||||
size_t size, enum dma_data_direction dir,
|
||||
struct dma_attrs *attrs)
|
||||
static void
|
||||
or1k_unmap_page(struct device *dev, dma_addr_t dma_handle,
|
||||
size_t size, enum dma_data_direction dir,
|
||||
struct dma_attrs *attrs)
|
||||
{
|
||||
/* Nothing special to do here... */
|
||||
}
|
||||
|
||||
int or1k_map_sg(struct device *dev, struct scatterlist *sg,
|
||||
int nents, enum dma_data_direction dir,
|
||||
struct dma_attrs *attrs)
|
||||
static int
|
||||
or1k_map_sg(struct device *dev, struct scatterlist *sg,
|
||||
int nents, enum dma_data_direction dir,
|
||||
struct dma_attrs *attrs)
|
||||
{
|
||||
struct scatterlist *s;
|
||||
int i;
|
||||
@ -169,9 +191,10 @@ int or1k_map_sg(struct device *dev, struct scatterlist *sg,
|
||||
return nents;
|
||||
}
|
||||
|
||||
void or1k_unmap_sg(struct device *dev, struct scatterlist *sg,
|
||||
int nents, enum dma_data_direction dir,
|
||||
struct dma_attrs *attrs)
|
||||
static void
|
||||
or1k_unmap_sg(struct device *dev, struct scatterlist *sg,
|
||||
int nents, enum dma_data_direction dir,
|
||||
struct dma_attrs *attrs)
|
||||
{
|
||||
struct scatterlist *s;
|
||||
int i;
|
||||
@ -181,9 +204,10 @@ void or1k_unmap_sg(struct device *dev, struct scatterlist *sg,
|
||||
}
|
||||
}
|
||||
|
||||
void or1k_sync_single_for_cpu(struct device *dev,
|
||||
dma_addr_t dma_handle, size_t size,
|
||||
enum dma_data_direction dir)
|
||||
static void
|
||||
or1k_sync_single_for_cpu(struct device *dev,
|
||||
dma_addr_t dma_handle, size_t size,
|
||||
enum dma_data_direction dir)
|
||||
{
|
||||
unsigned long cl;
|
||||
dma_addr_t addr = dma_handle;
|
||||
@ -193,9 +217,10 @@ void or1k_sync_single_for_cpu(struct device *dev,
|
||||
mtspr(SPR_DCBIR, cl);
|
||||
}
|
||||
|
||||
void or1k_sync_single_for_device(struct device *dev,
|
||||
dma_addr_t dma_handle, size_t size,
|
||||
enum dma_data_direction dir)
|
||||
static void
|
||||
or1k_sync_single_for_device(struct device *dev,
|
||||
dma_addr_t dma_handle, size_t size,
|
||||
enum dma_data_direction dir)
|
||||
{
|
||||
unsigned long cl;
|
||||
dma_addr_t addr = dma_handle;
|
||||
@ -205,6 +230,18 @@ void or1k_sync_single_for_device(struct device *dev,
|
||||
mtspr(SPR_DCBFR, cl);
|
||||
}
|
||||
|
||||
struct dma_map_ops or1k_dma_map_ops = {
|
||||
.alloc = or1k_dma_alloc,
|
||||
.free = or1k_dma_free,
|
||||
.map_page = or1k_map_page,
|
||||
.unmap_page = or1k_unmap_page,
|
||||
.map_sg = or1k_map_sg,
|
||||
.unmap_sg = or1k_unmap_sg,
|
||||
.sync_single_for_cpu = or1k_sync_single_for_cpu,
|
||||
.sync_single_for_device = or1k_sync_single_for_device,
|
||||
};
|
||||
EXPORT_SYMBOL(or1k_dma_map_ops);
|
||||
|
||||
/* Number of entries preallocated for DMA-API debugging */
|
||||
#define PREALLOC_DMA_DEBUG_ENTRIES (1 << 16)
|
||||
|
||||
|
@ -1117,10 +1117,10 @@ ENTRY(sys_rt_sigreturn)
|
||||
ENTRY(sys_or1k_atomic)
|
||||
/* FIXME: This ignores r3 and always does an XCHG */
|
||||
DISABLE_INTERRUPTS(r17,r19)
|
||||
l.lwz r30,0(r4)
|
||||
l.lwz r28,0(r5)
|
||||
l.sw 0(r4),r28
|
||||
l.sw 0(r5),r30
|
||||
l.lwz r29,0(r4)
|
||||
l.lwz r27,0(r5)
|
||||
l.sw 0(r4),r27
|
||||
l.sw 0(r5),r29
|
||||
ENABLE_INTERRUPTS(r17)
|
||||
l.jr r9
|
||||
l.or r11,r0,r0
|
||||
|
@ -14,17 +14,13 @@
|
||||
* 2 of the License, or (at your option) any later version.
|
||||
*/
|
||||
|
||||
#include <linux/ptrace.h>
|
||||
#include <linux/errno.h>
|
||||
#include <linux/interrupt.h>
|
||||
#include <linux/init.h>
|
||||
#include <linux/of.h>
|
||||
#include <linux/ftrace.h>
|
||||
#include <linux/irq.h>
|
||||
#include <linux/seq_file.h>
|
||||
#include <linux/kernel_stat.h>
|
||||
#include <linux/export.h>
|
||||
|
||||
#include <linux/irqdomain.h>
|
||||
#include <linux/irqflags.h>
|
||||
|
||||
/* read interrupt enabled status */
|
||||
@ -98,6 +94,7 @@ static void or1k_pic_mask_ack(struct irq_data *data)
|
||||
#endif
|
||||
}
|
||||
|
||||
#if 0
|
||||
static int or1k_pic_set_type(struct irq_data *data, unsigned int flow_type)
|
||||
{
|
||||
/* There's nothing to do in the PIC configuration when changing
|
||||
@ -107,43 +104,64 @@ static int or1k_pic_set_type(struct irq_data *data, unsigned int flow_type)
|
||||
|
||||
return irq_setup_alt_chip(data, flow_type);
|
||||
}
|
||||
#endif
|
||||
|
||||
static struct irq_chip or1k_dev = {
|
||||
.name = "or1k-PIC",
|
||||
.irq_unmask = or1k_pic_unmask,
|
||||
.irq_mask = or1k_pic_mask,
|
||||
.irq_ack = or1k_pic_ack,
|
||||
.irq_mask_ack = or1k_pic_mask_ack,
|
||||
};
|
||||
|
||||
static struct irq_domain *root_domain;
|
||||
|
||||
static inline int pic_get_irq(int first)
|
||||
{
|
||||
int irq;
|
||||
int hwirq;
|
||||
|
||||
irq = ffs(mfspr(SPR_PICSR) >> first);
|
||||
hwirq = ffs(mfspr(SPR_PICSR) >> first);
|
||||
if (!hwirq)
|
||||
return NO_IRQ;
|
||||
else
|
||||
hwirq = hwirq + first -1;
|
||||
|
||||
return irq ? irq + first - 1 : NO_IRQ;
|
||||
return irq_find_mapping(root_domain, hwirq);
|
||||
}
|
||||
|
||||
|
||||
static int or1k_map(struct irq_domain *d, unsigned int irq, irq_hw_number_t hw)
|
||||
{
|
||||
irq_set_chip_and_handler_name(irq, &or1k_dev,
|
||||
handle_level_irq, "level");
|
||||
irq_set_status_flags(irq, IRQ_LEVEL | IRQ_NOPROBE);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static const struct irq_domain_ops or1k_irq_domain_ops = {
|
||||
.xlate = irq_domain_xlate_onecell,
|
||||
.map = or1k_map,
|
||||
};
|
||||
|
||||
/*
|
||||
* This sets up the IRQ domain for the PIC built in to the OpenRISC
|
||||
* 1000 CPU. This is the "root" domain as these are the interrupts
|
||||
* that directly trigger an exception in the CPU.
|
||||
*/
|
||||
static void __init or1k_irq_init(void)
|
||||
{
|
||||
struct irq_chip_generic *gc;
|
||||
struct irq_chip_type *ct;
|
||||
struct device_node *intc = NULL;
|
||||
|
||||
/* The interrupt controller device node is mandatory */
|
||||
intc = of_find_compatible_node(NULL, NULL, "opencores,or1k-pic");
|
||||
BUG_ON(!intc);
|
||||
|
||||
/* Disable all interrupts until explicitly requested */
|
||||
mtspr(SPR_PICMR, (0UL));
|
||||
|
||||
gc = irq_alloc_generic_chip("or1k-PIC", 1, 0, 0, handle_level_irq);
|
||||
ct = gc->chip_types;
|
||||
|
||||
ct->chip.irq_unmask = or1k_pic_unmask;
|
||||
ct->chip.irq_mask = or1k_pic_mask;
|
||||
ct->chip.irq_ack = or1k_pic_ack;
|
||||
ct->chip.irq_mask_ack = or1k_pic_mask_ack;
|
||||
ct->chip.irq_set_type = or1k_pic_set_type;
|
||||
|
||||
/* The OR1K PIC can handle both level and edge trigged
|
||||
* interrupts in roughly the same manner
|
||||
*/
|
||||
#if 0
|
||||
/* FIXME: chip.type??? */
|
||||
ct->chip.type = IRQ_TYPE_EDGE_BOTH | IRQ_TYPE_LEVEL_MASK;
|
||||
#endif
|
||||
|
||||
irq_setup_generic_chip(gc, IRQ_MSK(NR_IRQS), 0,
|
||||
IRQ_NOREQUEST, IRQ_LEVEL | IRQ_NOPROBE);
|
||||
root_domain = irq_domain_add_linear(intc, 32,
|
||||
&or1k_irq_domain_ops, NULL);
|
||||
}
|
||||
|
||||
void __init init_IRQ(void)
|
||||
@ -164,10 +182,3 @@ void __irq_entry do_IRQ(struct pt_regs *regs)
|
||||
irq_exit();
|
||||
set_irq_regs(old_regs);
|
||||
}
|
||||
|
||||
unsigned int irq_create_of_mapping(struct device_node *controller,
|
||||
const u32 *intspec, unsigned int intsize)
|
||||
{
|
||||
return intspec[0];
|
||||
}
|
||||
EXPORT_SYMBOL_GPL(irq_create_of_mapping);
|
||||
|
@ -54,6 +54,7 @@ asmlinkage void do_page_fault(struct pt_regs *regs, unsigned long address,
|
||||
struct vm_area_struct *vma;
|
||||
siginfo_t info;
|
||||
int fault;
|
||||
unsigned int flags = FAULT_FLAG_ALLOW_RETRY | FAULT_FLAG_KILLABLE;
|
||||
|
||||
tsk = current;
|
||||
|
||||
@ -105,6 +106,7 @@ asmlinkage void do_page_fault(struct pt_regs *regs, unsigned long address,
|
||||
if (in_interrupt() || !mm)
|
||||
goto no_context;
|
||||
|
||||
retry:
|
||||
down_read(&mm->mmap_sem);
|
||||
vma = find_vma(mm, address);
|
||||
|
||||
@ -143,6 +145,7 @@ asmlinkage void do_page_fault(struct pt_regs *regs, unsigned long address,
|
||||
if (write_acc) {
|
||||
if (!(vma->vm_flags & VM_WRITE))
|
||||
goto bad_area;
|
||||
flags |= FAULT_FLAG_WRITE;
|
||||
} else {
|
||||
/* not present */
|
||||
if (!(vma->vm_flags & (VM_READ | VM_EXEC)))
|
||||
@ -159,7 +162,11 @@ asmlinkage void do_page_fault(struct pt_regs *regs, unsigned long address,
|
||||
* the fault.
|
||||
*/
|
||||
|
||||
fault = handle_mm_fault(mm, vma, address, write_acc);
|
||||
fault = handle_mm_fault(mm, vma, address, flags);
|
||||
|
||||
if ((fault & VM_FAULT_RETRY) && fatal_signal_pending(current))
|
||||
return;
|
||||
|
||||
if (unlikely(fault & VM_FAULT_ERROR)) {
|
||||
if (fault & VM_FAULT_OOM)
|
||||
goto out_of_memory;
|
||||
@ -167,11 +174,24 @@ asmlinkage void do_page_fault(struct pt_regs *regs, unsigned long address,
|
||||
goto do_sigbus;
|
||||
BUG();
|
||||
}
|
||||
/*RGD modeled on Cris */
|
||||
if (fault & VM_FAULT_MAJOR)
|
||||
tsk->maj_flt++;
|
||||
else
|
||||
tsk->min_flt++;
|
||||
|
||||
if (flags & FAULT_FLAG_ALLOW_RETRY) {
|
||||
/*RGD modeled on Cris */
|
||||
if (fault & VM_FAULT_MAJOR)
|
||||
tsk->maj_flt++;
|
||||
else
|
||||
tsk->min_flt++;
|
||||
if (fault & VM_FAULT_RETRY) {
|
||||
flags &= ~FAULT_FLAG_ALLOW_RETRY;
|
||||
|
||||
/* No need to up_read(&mm->mmap_sem) as we would
|
||||
* have already released it in __lock_page_or_retry
|
||||
* in mm/filemap.c.
|
||||
*/
|
||||
|
||||
goto retry;
|
||||
}
|
||||
}
|
||||
|
||||
up_read(&mm->mmap_sem);
|
||||
return;
|
||||
|
Loading…
Reference in New Issue
Block a user