forked from luck/tmp_suning_uos_patched
ARM: kprobes: Reject probing of undefined data processing instructions
The instruction decoding in space_cccc_000x needs to reject probing of instructions with undefined patterns as they may in future become defined and then emulated faultily - as has already happened with the SMC instruction. This fix is achieved by testing for the instruction patterns we want to probe and making the the default fall-through paths reject probes. This also allows us to remove some explicit tests for instructions that we wish to reject, as that is now the default action. Signed-off-by: Jon Medhurst <tixy@yxit.co.uk> Signed-off-by: Nicolas Pitre <nicolas.pitre@linaro.org>
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@ -966,14 +966,6 @@ space_cccc_000x(kprobe_opcode_t insn, struct arch_specific_insn *asi)
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/* cccc 0001 0xx0 xxxx xxxx xxxx xxxx xxx0 xxxx */
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if ((insn & 0x0f900010) == 0x01000000) {
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/* BXJ : cccc 0001 0010 xxxx xxxx xxxx 0010 xxxx */
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/* MSR : cccc 0001 0x10 xxxx xxxx xxxx 0000 xxxx */
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/* MRS spsr : cccc 0001 0100 xxxx xxxx xxxx 0000 xxxx */
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if ((insn & 0x0ff000f0) == 0x01200020 ||
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(insn & 0x0fb000f0) == 0x01200000 ||
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(insn & 0x0ff000f0) == 0x01400000)
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return INSN_REJECTED;
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/* MRS cpsr : cccc 0001 0000 xxxx xxxx xxxx 0000 xxxx */
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if ((insn & 0x0ff000f0) == 0x01000000) {
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if (is_r15(insn, 12))
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@ -994,17 +986,21 @@ space_cccc_000x(kprobe_opcode_t insn, struct arch_specific_insn *asi)
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/* SMLAxy : cccc 0001 0000 xxxx xxxx xxxx 1xx0 xxxx : Q */
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/* SMLAWy : cccc 0001 0010 xxxx xxxx xxxx 1x00 xxxx : Q */
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return prep_emulate_rd16rn12rs8rm0_wflags(insn, asi);
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if ((insn & 0x0ff00090) == 0x01000080 ||
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(insn & 0x0ff000b0) == 0x01200080)
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return prep_emulate_rd16rn12rs8rm0_wflags(insn, asi);
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/* BXJ : cccc 0001 0010 xxxx xxxx xxxx 0010 xxxx */
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/* MSR : cccc 0001 0x10 xxxx xxxx xxxx 0000 xxxx */
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/* MRS spsr : cccc 0001 0100 xxxx xxxx xxxx 0000 xxxx */
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/* Other instruction encodings aren't yet defined */
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return INSN_REJECTED;
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}
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/* cccc 0001 0xx0 xxxx xxxx xxxx xxxx 0xx1 xxxx */
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else if ((insn & 0x0f900090) == 0x01000010) {
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/* BKPT : 1110 0001 0010 xxxx xxxx xxxx 0111 xxxx */
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if ((insn & 0xfff000f0) == 0xe1200070)
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return INSN_REJECTED;
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/* BLX(2) : cccc 0001 0010 xxxx xxxx xxxx 0011 xxxx */
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/* BX : cccc 0001 0010 xxxx xxxx xxxx 0001 xxxx */
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if ((insn & 0x0ff000d0) == 0x01200010) {
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@ -1022,7 +1018,14 @@ space_cccc_000x(kprobe_opcode_t insn, struct arch_specific_insn *asi)
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/* QSUB : cccc 0001 0010 xxxx xxxx xxxx 0101 xxxx :Q */
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/* QDADD : cccc 0001 0100 xxxx xxxx xxxx 0101 xxxx :Q */
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/* QDSUB : cccc 0001 0110 xxxx xxxx xxxx 0101 xxxx :Q */
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return prep_emulate_rd12rn16rm0_wflags(insn, asi);
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if ((insn & 0x0f9000f0) == 0x01000050)
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return prep_emulate_rd12rn16rm0_wflags(insn, asi);
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/* BKPT : 1110 0001 0010 xxxx xxxx xxxx 0111 xxxx */
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/* SMC : cccc 0001 0110 xxxx xxxx xxxx 0111 xxxx */
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/* Other instruction encodings aren't yet defined */
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return INSN_REJECTED;
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}
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/* cccc 0000 xxxx xxxx xxxx xxxx xxxx 1001 xxxx */
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