forked from luck/tmp_suning_uos_patched
gpio: 104-dio-48e: utilize for_each_set_clump8 macro
Replace verbose implementation in get_multiple/set_multiple callbacks with for_each_set_clump8 macro to simplify code and improve clarity. Link: http://lkml.kernel.org/r/08b9c9a3e75ef1ab0d172223d10a1661f2b43fe2.1570641097.git.vilhelm.gray@gmail.com Signed-off-by: William Breathitt Gray <vilhelm.gray@gmail.com> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Cc: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Cc: Arnd Bergmann <arnd@arndb.de> Cc: Bartosz Golaszewski <bgolaszewski@baylibre.com> Cc: Geert Uytterhoeven <geert@linux-m68k.org> Cc: Geert Uytterhoeven <geert+renesas@glider.be> Cc: Lukas Wunner <lukas@wunner.de> Cc: Masahiro Yamada <yamada.masahiro@socionext.com> Cc: Mathias Duckeck <m.duckeck@kunbus.de> Cc: Morten Hein Tiljeset <morten.tiljeset@prevas.dk> Cc: Phil Reid <preid@electromag.com.au> Cc: Rasmus Villemoes <linux@rasmusvillemoes.dk> Cc: Sean Nyekjaer <sean.nyekjaer@prevas.dk> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
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@ -178,46 +178,25 @@ static int dio48e_gpio_get(struct gpio_chip *chip, unsigned offset)
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return !!(port_state & mask);
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}
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static const size_t ports[] = { 0, 1, 2, 4, 5, 6 };
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static int dio48e_gpio_get_multiple(struct gpio_chip *chip, unsigned long *mask,
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unsigned long *bits)
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{
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struct dio48e_gpio *const dio48egpio = gpiochip_get_data(chip);
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size_t i;
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static const size_t ports[] = { 0, 1, 2, 4, 5, 6 };
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const unsigned int gpio_reg_size = 8;
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unsigned int bits_offset;
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size_t word_index;
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unsigned int word_offset;
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unsigned long word_mask;
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const unsigned long port_mask = GENMASK(gpio_reg_size - 1, 0);
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unsigned long offset;
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unsigned long gpio_mask;
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unsigned int port_addr;
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unsigned long port_state;
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/* clear bits array to a clean slate */
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bitmap_zero(bits, chip->ngpio);
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/* get bits are evaluated a gpio port register at a time */
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for (i = 0; i < ARRAY_SIZE(ports); i++) {
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/* gpio offset in bits array */
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bits_offset = i * gpio_reg_size;
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for_each_set_clump8(offset, gpio_mask, mask, ARRAY_SIZE(ports) * 8) {
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port_addr = dio48egpio->base + ports[offset / 8];
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port_state = inb(port_addr) & gpio_mask;
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/* word index for bits array */
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word_index = BIT_WORD(bits_offset);
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/* gpio offset within current word of bits array */
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word_offset = bits_offset % BITS_PER_LONG;
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/* mask of get bits for current gpio within current word */
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word_mask = mask[word_index] & (port_mask << word_offset);
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if (!word_mask) {
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/* no get bits in this port so skip to next one */
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continue;
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}
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/* read bits from current gpio port */
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port_state = inb(dio48egpio->base + ports[i]);
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/* store acquired bits at respective bits array offset */
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bits[word_index] |= (port_state << word_offset) & word_mask;
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bitmap_set_value8(bits, port_state, offset);
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}
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return 0;
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@ -247,37 +226,27 @@ static void dio48e_gpio_set_multiple(struct gpio_chip *chip,
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unsigned long *mask, unsigned long *bits)
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{
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struct dio48e_gpio *const dio48egpio = gpiochip_get_data(chip);
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unsigned int i;
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const unsigned int gpio_reg_size = 8;
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unsigned int port;
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unsigned int out_port;
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unsigned int bitmask;
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unsigned long offset;
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unsigned long gpio_mask;
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size_t index;
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unsigned int port_addr;
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unsigned long bitmask;
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unsigned long flags;
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/* set bits are evaluated a gpio register size at a time */
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for (i = 0; i < chip->ngpio; i += gpio_reg_size) {
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/* no more set bits in this mask word; skip to the next word */
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if (!mask[BIT_WORD(i)]) {
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i = (BIT_WORD(i) + 1) * BITS_PER_LONG - gpio_reg_size;
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continue;
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}
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for_each_set_clump8(offset, gpio_mask, mask, ARRAY_SIZE(ports) * 8) {
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index = offset / 8;
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port_addr = dio48egpio->base + ports[index];
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port = i / gpio_reg_size;
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out_port = (port > 2) ? port + 1 : port;
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bitmask = mask[BIT_WORD(i)] & bits[BIT_WORD(i)];
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bitmask = bitmap_get_value8(bits, offset) & gpio_mask;
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raw_spin_lock_irqsave(&dio48egpio->lock, flags);
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/* update output state data and set device gpio register */
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dio48egpio->out_state[port] &= ~mask[BIT_WORD(i)];
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dio48egpio->out_state[port] |= bitmask;
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outb(dio48egpio->out_state[port], dio48egpio->base + out_port);
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dio48egpio->out_state[index] &= ~gpio_mask;
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dio48egpio->out_state[index] |= bitmask;
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outb(dio48egpio->out_state[index], port_addr);
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raw_spin_unlock_irqrestore(&dio48egpio->lock, flags);
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/* prepare for next gpio register set */
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mask[BIT_WORD(i)] >>= gpio_reg_size;
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bits[BIT_WORD(i)] >>= gpio_reg_size;
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}
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}
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