AcoSail/kernel_optimize_test
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Merge branch 'master' into devel

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This commit is contained in:
Russell King 2010-05-24 23:08:54 +01:00
commit f949c0edd8
18 changed files with 41 additions and 25 deletions
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11
arch/arm/Kconfig
View File

@ -1421,6 +1421,17 @@ config CMDLINE
time by entering them here. As a minimum, you should specify the
memory size and the root device (e.g., mem=64M root=/dev/nfs).
config CMDLINE_FORCE
bool "Always use the default kernel command string"
depends on CMDLINE != ""
help
Always use the default kernel command string, even if the boot
loader passes other arguments to the kernel.
This is useful if you cannot or don't want to change the
command-line options your boot loader passes to the kernel.
If unsure, say N.
config XIP_KERNEL
bool "Kernel Execute-In-Place from ROM"
depends on !ZBOOT_ROM

2
arch/arm/boot/bootp/bootp.lds
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@ -19,7 +19,7 @@ SECTIONS
initrd_size = initrd_end - initrd_start;
_etext = .;
}
.stab 0 : { *(.stab) }
.stabstr 0 : { *(.stabstr) }
.stab.excl 0 : { *(.stab.excl) }

2
arch/arm/kernel/setup.c
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@ -593,6 +593,7 @@ static int __init parse_tag_revision(const struct tag *tag)
__tagtable(ATAG_REVISION, parse_tag_revision);
#ifndef CONFIG_CMDLINE_FORCE
static int __init parse_tag_cmdline(const struct tag *tag)
{
strlcpy(default_command_line, tag->u.cmdline.cmdline, COMMAND_LINE_SIZE);
@ -600,6 +601,7 @@ static int __init parse_tag_cmdline(const struct tag *tag)
}
__tagtable(ATAG_CMDLINE, parse_tag_cmdline);
#endif /* CONFIG_CMDLINE_FORCE */
/*
* Scan the tag table for this tag, and call its parse function.

2
arch/arm/kernel/unwind.c
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@ -26,6 +26,7 @@
* http://infocenter.arm.com/help/topic/com.arm.doc.subset.swdev.abi/index.html
*/
#ifndef __CHECKER__
#if !defined (__ARM_EABI__)
#warning Your compiler does not have EABI support.
#warning ARM unwind is known to compile only with EABI compilers.
@ -34,6 +35,7 @@
#warning Your compiler is too buggy; it is known to not compile ARM unwind support.
#warning Change compiler or disable ARM_UNWIND option.
#endif
#endif /* __CHECKER__ */
#include <linux/kernel.h>
#include <linux/init.h>

1
arch/arm/mach-at91/board-sam9m10g45ek.c
View File

@ -25,7 +25,6 @@
#include <linux/leds.h>
#include <linux/clk.h>
#include <mach/hardware.h>
#include <video/atmel_lcdc.h>
#include <asm/setup.h>

3
arch/arm/mach-clps711x/Makefile.boot
View File

@ -1,7 +1,6 @@
# The standard locations for stuff on CLPS711x type processors
zreladdr-y := 0xc0028000
zreladdr-y := 0xc0028000
params_phys-y := 0xc0000100
# Should probably have some agreement on these...
initrd_phys-$(CONFIG_ARCH_P720T) := 0xc0400000
initrd_phys-$(CONFIG_ARCH_CDB89712) := 0x00700000

6
arch/arm/mach-footbridge/ebsa285-pci.c
View File

@ -20,9 +20,9 @@ static int __init ebsa285_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
if (dev->vendor == PCI_VENDOR_ID_CONTAQ &&
dev->device == PCI_DEVICE_ID_CONTAQ_82C693)
switch (PCI_FUNC(dev->devfn)) {
case 1: return 14;
case 2: return 15;
case 3: return 12;
case 1: return 14;
case 2: return 15;
case 3: return 12;
}
return irqmap_ebsa285[(slot + pin) & 3];

4
arch/arm/mach-h720x/common.h
View File

@ -14,13 +14,13 @@
*/
extern unsigned long h720x_gettimeoffset(void);
extern void __init h720x_init_irq (void);
extern void __init h720x_init_irq(void);
extern void __init h720x_map_io(void);
#ifdef CONFIG_ARCH_H7202
extern struct sys_timer h7202_timer;
extern void __init init_hw_h7202(void);
extern void __init h7202_init_irq (void);
extern void __init h7202_init_irq(void);
extern void __init h7202_init_time(void);
#endif

1
arch/arm/mach-msm/board-msm7x27.c
View File

@ -20,7 +20,6 @@
#include <linux/input.h>
#include <linux/io.h>
#include <linux/delay.h>
#include <linux/bootmem.h>
#include <linux/power_supply.h>
#include <mach/hardware.h>

1
arch/arm/mach-msm/board-msm7x30.c
View File

@ -20,7 +20,6 @@
#include <linux/gpio.h>
#include <linux/platform_device.h>
#include <linux/delay.h>
#include <linux/bootmem.h>
#include <linux/io.h>
#include <linux/smsc911x.h>

1
arch/arm/mach-msm/board-qsd8x50.c
View File

@ -19,7 +19,6 @@
#include <linux/irq.h>
#include <linux/gpio.h>
#include <linux/platform_device.h>
#include <linux/bootmem.h>
#include <linux/delay.h>
#include <asm/mach-types.h>

4
arch/arm/mach-mx2/devices.c
View File

@ -478,8 +478,8 @@ int __init mxc_register_gpios(void)
#ifdef CONFIG_MACH_MX21
static struct resource mx21_usbhc_resources[] = {
{
.start = MX21_BASE_ADDR,
.end = MX21_BASE_ADDR + 0x1FFF,
.start = MX21_USBOTG_BASE_ADDR,
.end = MX21_USBOTG_BASE_ADDR + SZ_8K - 1,
.flags = IORESOURCE_MEM,
},
{

8
arch/arm/mach-sa1100/leds.c
View File

@ -2,7 +2,7 @@
* linux/arch/arm/mach-sa1100/leds.c
*
* SA1100 LEDs dispatcher
*
*
* Copyright (C) 2001 Nicolas Pitre
*/
#include <linux/compiler.h>
@ -18,10 +18,10 @@ sa1100_leds_init(void)
{
if (machine_is_assabet())
leds_event = assabet_leds_event;
if (machine_is_consus())
leds_event = consus_leds_event;
if (machine_is_consus())
leds_event = consus_leds_event;
if (machine_is_badge4())
leds_event = badge4_leds_event;
leds_event = badge4_leds_event;
if (machine_is_brutus())
leds_event = brutus_leds_event;
if (machine_is_cerf())

11
arch/arm/mach-shark/pci.c
View File

@ -16,16 +16,19 @@
static int __init shark_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
{
if (dev->bus->number == 0)
if (dev->devfn == 0) return 255;
else return 11;
else return 255;
if (dev->devfn == 0)
return 255;
else
return 11;
else
return 255;
}
extern void __init via82c505_preinit(void);
static struct hw_pci shark_pci __initdata = {
.setup = via82c505_setup,
.swizzle = pci_std_swizzle,
.swizzle = pci_std_swizzle,
.map_irq = shark_map_irq,
.nr_controllers = 1,
.scan = via82c505_scan_bus,

1
arch/arm/mach-spear6xx/spear6xx.c
View File

@ -13,7 +13,6 @@
#include <linux/types.h>
#include <linux/amba/pl061.h>
#include <linux/types.h>
#include <linux/ptrace.h>
#include <linux/io.h>
#include <asm/hardware/vic.h>

4
arch/arm/mm/cache-v7.S
View File

@ -91,7 +91,11 @@ ENTRY(v7_flush_kern_cache_all)
THUMB( stmfd sp!, {r4-r7, r9-r11, lr} )
bl v7_flush_dcache_all
mov r0, #0
#ifdef CONFIG_SMP
mcr p15, 0, r0, c7, c1, 0 @ invalidate I-cache inner shareable
#else
mcr p15, 0, r0, c7, c5, 0 @ I+BTB cache invalidate
#endif
ARM( ldmfd sp!, {r4-r5, r7, r9-r11, lr} )
THUMB( ldmfd sp!, {r4-r7, r9-r11, lr} )
mov pc, lr

2
arch/arm/nwfpe/ChangeLog
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@ -72,7 +72,7 @@
1998-11-23 Scott Bambrough <scottb@netwinder.org>
* README.FPE - fix typo in description of lfm/sfm instructions
* NOTES - Added file to describe known bugs/problems
* NOTES - Added file to describe known bugs/problems
* fpmodule.c - Changed version number to 0.94
1998-11-20 Scott Bambrough <scottb@netwinder.org>

2
arch/arm/nwfpe/fpsr.h
View File

@ -30,7 +30,7 @@ one byte.
EXCEPTION TRAP ENABLE BYTE
SYSTEM CONTROL BYTE
CUMULATIVE EXCEPTION FLAGS BYTE
The FPCR is a 32 bit register consisting of bit flags.
*/