forked from luck/tmp_suning_uos_patched
watchdog: clean-up f71808e_wdt.c
Cleaned up and replaced some magic numbers by constants. Signed-off-by: Lutz Ballaschke <vegan.grindcore@googlemail.com> Signed-off-by: Wim Van Sebroeck <wim@iguana.be>
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@ -42,18 +42,19 @@
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#define SIO_REG_DEVID 0x20 /* Device ID (2 bytes) */
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#define SIO_REG_DEVREV 0x22 /* Device revision */
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#define SIO_REG_MANID 0x23 /* Fintek ID (2 bytes) */
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#define SIO_REG_MFUNCT1 0x29 /* Multi function select 1 */
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#define SIO_REG_MFUNCT2 0x2a /* Multi function select 2 */
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#define SIO_REG_MFUNCT3 0x2b /* Multi function select 3 */
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#define SIO_REG_ENABLE 0x30 /* Logical device enable */
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#define SIO_REG_ADDR 0x60 /* Logical device address (2 bytes) */
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#define SIO_FINTEK_ID 0x1934 /* Manufacturers ID */
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#define SIO_F71808_ID 0x0901 /* Chipset ID */
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#define SIO_F71858_ID 0x0507 /* Chipset ID */
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#define SIO_F71808_ID 0x0901 /* Chipset ID */
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#define SIO_F71858_ID 0x0507 /* Chipset ID */
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#define SIO_F71862_ID 0x0601 /* Chipset ID */
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#define SIO_F71882_ID 0x0541 /* Chipset ID */
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#define SIO_F71889_ID 0x0723 /* Chipset ID */
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#define F71882FG_REG_START 0x01
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#define F71808FG_REG_WDO_CONF 0xf0
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#define F71808FG_REG_WDT_CONF 0xf5
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#define F71808FG_REG_WD_TIME 0xf6
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@ -76,7 +77,7 @@ module_param(force_id, ushort, 0);
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MODULE_PARM_DESC(force_id, "Override the detected device ID");
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static const int max_timeout = WATCHDOG_MAX_TIMEOUT;
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static int timeout = 60; /* default timeout in seconds */
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static int timeout = WATCHDOG_TIMEOUT; /* default timeout in seconds */
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module_param(timeout, int, 0);
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MODULE_PARM_DESC(timeout,
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"Watchdog timeout in seconds. 1<= timeout <="
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@ -299,19 +300,19 @@ static int watchdog_start(void)
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switch (watchdog.type) {
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case f71808fg:
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/* Set pin 21 to GPIO23/WDTRST#, then to WDTRST# */
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superio_clear_bit(watchdog.sioaddr, 0x2a, 3);
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superio_clear_bit(watchdog.sioaddr, 0x2b, 3);
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superio_clear_bit(watchdog.sioaddr, SIO_REG_MFUNCT2, 3);
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superio_clear_bit(watchdog.sioaddr, SIO_REG_MFUNCT3, 3);
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break;
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case f71882fg:
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/* Set pin 56 to WDTRST# */
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superio_set_bit(watchdog.sioaddr, 0x29, 1);
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superio_set_bit(watchdog.sioaddr, SIO_REG_MFUNCT1, 1);
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break;
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case f71889fg:
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/* set pin 40 to WDTRST# */
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superio_outb(watchdog.sioaddr, 0x2b,
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superio_inb(watchdog.sioaddr, 0x2b) & 0xcf);
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superio_outb(watchdog.sioaddr, SIO_REG_MFUNCT3,
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superio_inb(watchdog.sioaddr, SIO_REG_MFUNCT3) & 0xcf);
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break;
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default:
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