AcoSail/kernel_optimize_test
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MIPS: For Cavium OCTEON set hwrena and lazily restore CP2 state.

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If on Cavium, be aware of cop2 and hwrena during do_cpu().

Signed-off-by: Tomaso Paoletti <tpaoletti@caviumnetworks.com>
Signed-off-by: Paul Gortmaker <Paul.Gortmaker@windriver.com>
Signed-off-by: David Daney <ddaney@caviumnetworks.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
This commit is contained in:
David Daney 2008-12-11 15:33:23 -08:00 committed by Ralf Baechle
parent bd6d85c21a
commit f9bb4cf37a
1 changed files with 21 additions and 0 deletions
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21
arch/mips/kernel/traps.c
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@ -47,6 +47,7 @@
#include <asm/mmu_context.h>
#include <asm/types.h>
#include <asm/stacktrace.h>
#include <asm/irq.h>
extern void check_wait(void);
extern asmlinkage void r4k_wait(void);
@ -78,6 +79,10 @@ extern asmlinkage void handle_reserved(void);
extern int fpu_emulator_cop1Handler(struct pt_regs *xcp,
struct mips_fpu_struct *ctx, int has_fpu);
#ifdef CONFIG_CPU_CAVIUM_OCTEON
extern asmlinkage void octeon_cop2_restore(struct octeon_cop2_state *task);
#endif
void (*board_be_init)(void);
int (*board_be_handler)(struct pt_regs *regs, int is_fixup);
void (*board_nmi_handler_setup)(void);
@ -860,6 +865,7 @@ asmlinkage void do_cpu(struct pt_regs *regs)
unsigned int opcode;
unsigned int cpid;
int status;
unsigned long __maybe_unused flags;
die_if_kernel("do_cpu invoked from kernel context!", regs);
@ -915,6 +921,17 @@ asmlinkage void do_cpu(struct pt_regs *regs)
return;
case 2:
#ifdef CONFIG_CPU_CAVIUM_OCTEON
prefetch(&current->thread.cp2);
local_irq_save(flags);
KSTK_STATUS(current) |= ST0_CU2;
status = read_c0_status();
write_c0_status(status | ST0_CU2);
octeon_cop2_restore(&(current->thread.cp2));
write_c0_status(status & ~ST0_CU2);
local_irq_restore(flags);
return;
#endif
case 3:
break;
}
@ -1488,6 +1505,10 @@ void __cpuinit per_cpu_trap_init(void)
write_c0_hwrena(enable);
}
#ifdef CONFIG_CPU_CAVIUM_OCTEON
write_c0_hwrena(0xc000000f); /* Octeon has register 30 and 31 */
#endif
#ifdef CONFIG_MIPS_MT_SMTC
if (!secondaryTC) {
#endif /* CONFIG_MIPS_MT_SMTC */