forked from luck/tmp_suning_uos_patched
clocksource/drivers/orion: Convert init function to return error
The init functions do not return any error. They behave as the following: - panic, thus leading to a kernel crash while another timer may work and make the system boot up correctly or - print an error and let the caller unaware if the state of the system Change that by converting the init functions to return an error conforming to the CLOCKSOURCE_OF_RET prototype. Proper error handling (rollback, errno value) will be changed later case by case, thus this change just return back an error or success in the init function. Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
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4e2afeb9e6
commit
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@ -104,25 +104,36 @@ static struct irqaction orion_clkevt_irq = {
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.handler = orion_clkevt_irq_handler,
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};
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static void __init orion_timer_init(struct device_node *np)
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static int __init orion_timer_init(struct device_node *np)
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{
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struct clk *clk;
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int irq;
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int irq, ret;
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/* timer registers are shared with watchdog timer */
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timer_base = of_iomap(np, 0);
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if (!timer_base)
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panic("%s: unable to map resource\n", np->name);
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if (!timer_base) {
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pr_err("%s: unable to map resource\n", np->name);
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return -ENXIO;
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}
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clk = of_clk_get(np, 0);
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if (IS_ERR(clk))
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panic("%s: unable to get clk\n", np->name);
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clk_prepare_enable(clk);
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if (IS_ERR(clk)) {
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pr_err("%s: unable to get clk\n", np->name);
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return PTR_ERR(clk);
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}
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ret = clk_prepare_enable(clk);
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if (ret) {
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pr_err("Failed to prepare clock");
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return ret;
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}
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/* we are only interested in timer1 irq */
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irq = irq_of_parse_and_map(np, 1);
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if (irq <= 0)
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panic("%s: unable to parse timer1 irq\n", np->name);
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if (irq <= 0) {
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pr_err("%s: unable to parse timer1 irq\n", np->name);
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return -EINVAL;
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}
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/* setup timer0 as free-running clocksource */
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writel(~0, timer_base + TIMER0_VAL);
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@ -130,19 +141,30 @@ static void __init orion_timer_init(struct device_node *np)
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atomic_io_modify(timer_base + TIMER_CTRL,
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TIMER0_RELOAD_EN | TIMER0_EN,
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TIMER0_RELOAD_EN | TIMER0_EN);
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clocksource_mmio_init(timer_base + TIMER0_VAL, "orion_clocksource",
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clk_get_rate(clk), 300, 32,
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clocksource_mmio_readl_down);
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ret = clocksource_mmio_init(timer_base + TIMER0_VAL, "orion_clocksource",
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clk_get_rate(clk), 300, 32,
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clocksource_mmio_readl_down);
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if (ret) {
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pr_err("Failed to initialize mmio timer");
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return ret;
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}
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sched_clock_register(orion_read_sched_clock, 32, clk_get_rate(clk));
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/* setup timer1 as clockevent timer */
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if (setup_irq(irq, &orion_clkevt_irq))
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panic("%s: unable to setup irq\n", np->name);
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ret = setup_irq(irq, &orion_clkevt_irq);
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if (ret) {
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pr_err("%s: unable to setup irq\n", np->name);
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return ret;
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}
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ticks_per_jiffy = (clk_get_rate(clk) + HZ/2) / HZ;
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orion_clkevt.cpumask = cpumask_of(0);
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orion_clkevt.irq = irq;
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clockevents_config_and_register(&orion_clkevt, clk_get_rate(clk),
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ORION_ONESHOT_MIN, ORION_ONESHOT_MAX);
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return 0;
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}
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CLOCKSOURCE_OF_DECLARE(orion_timer, "marvell,orion-timer", orion_timer_init);
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CLOCKSOURCE_OF_DECLARE_RET(orion_timer, "marvell,orion-timer", orion_timer_init);
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