forked from luck/tmp_suning_uos_patched
ASoC: S3C I2S LRCLK polarity option.
1) Explicitly set LRCLK polarity for I2S Vs LSM/MSB modes. 2) Convert from numerical to bit-field values for BCLK selection. 3) Use proper error checking for return value from clk_get Signed-off-by: Jassi <jassi.brar@samsung.com> Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
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@ -308,12 +308,15 @@ static int s3c2412_i2s_set_fmt(struct snd_soc_dai *cpu_dai,
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switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
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case SND_SOC_DAIFMT_RIGHT_J:
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iismod |= S3C2412_IISMOD_LR_RLOW;
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iismod |= S3C2412_IISMOD_SDF_MSB;
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break;
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case SND_SOC_DAIFMT_LEFT_J:
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iismod |= S3C2412_IISMOD_LR_RLOW;
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iismod |= S3C2412_IISMOD_SDF_LSB;
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break;
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case SND_SOC_DAIFMT_I2S:
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iismod &= ~S3C2412_IISMOD_LR_RLOW;
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iismod |= S3C2412_IISMOD_SDF_IIS;
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break;
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default:
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@ -463,6 +466,31 @@ static int s3c2412_i2s_set_clkdiv(struct snd_soc_dai *cpu_dai,
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switch (div_id) {
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case S3C_I2SV2_DIV_BCLK:
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if (div > 3) {
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/* convert value to bit field */
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switch (div) {
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case 16:
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div = S3C2412_IISMOD_BCLK_16FS;
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break;
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case 32:
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div = S3C2412_IISMOD_BCLK_32FS;
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break;
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case 24:
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div = S3C2412_IISMOD_BCLK_24FS;
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break;
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case 48:
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div = S3C2412_IISMOD_BCLK_48FS;
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break;
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default:
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return -EINVAL;
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}
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}
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reg = readl(i2s->regs + S3C2412_IISMOD);
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reg &= ~S3C2412_IISMOD_BCLK_MASK;
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writel(reg | div, i2s->regs + S3C2412_IISMOD);
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@ -622,7 +650,7 @@ int s3c_i2sv2_probe(struct platform_device *pdev,
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}
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i2s->iis_pclk = clk_get(dev, "iis");
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if (i2s->iis_pclk == NULL) {
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if (IS_ERR(i2s->iis_pclk)) {
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dev_err(dev, "failed to get iis_clock\n");
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iounmap(i2s->regs);
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return -ENOENT;
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