forked from luck/tmp_suning_uos_patched
ARM: mx3: use MX3x_ prefixed version of CHIP_REV_x
Also, remove the deprecated symbols from arch/arm/mach-mx3/cpu.c Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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@ -7,7 +7,6 @@
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obj-y := mm.o devices.o cpu.o
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CFLAGS_mm.o = -DIMX_NEEDS_DEPRECATED_SYMBOLS
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CFLAGS_devices.o = -DIMX_NEEDS_DEPRECATED_SYMBOLS
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CFLAGS_cpu.o = -DIMX_NEEDS_DEPRECATED_SYMBOLS
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obj-$(CONFIG_ARCH_MX31) += clock-imx31.o iomux-imx31.o
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obj-$(CONFIG_ARCH_MX35) += clock-imx35.o
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obj-$(CONFIG_MACH_MX31ADS) += mach-mx31ads.o
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@ -25,15 +25,15 @@ struct mx3_cpu_type {
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};
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static struct mx3_cpu_type mx31_cpu_type[] __initdata = {
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{ .srev = 0x00, .name = "i.MX31(L)", .v = "1.0", .rev = CHIP_REV_1_0 },
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{ .srev = 0x10, .name = "i.MX31", .v = "1.1", .rev = CHIP_REV_1_1 },
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{ .srev = 0x11, .name = "i.MX31L", .v = "1.1", .rev = CHIP_REV_1_1 },
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{ .srev = 0x12, .name = "i.MX31", .v = "1.15", .rev = CHIP_REV_1_1 },
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{ .srev = 0x13, .name = "i.MX31L", .v = "1.15", .rev = CHIP_REV_1_1 },
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{ .srev = 0x14, .name = "i.MX31", .v = "1.2", .rev = CHIP_REV_1_2 },
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{ .srev = 0x15, .name = "i.MX31L", .v = "1.2", .rev = CHIP_REV_1_2 },
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{ .srev = 0x28, .name = "i.MX31", .v = "2.0", .rev = CHIP_REV_2_0 },
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{ .srev = 0x29, .name = "i.MX31L", .v = "2.0", .rev = CHIP_REV_2_0 },
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{ .srev = 0x00, .name = "i.MX31(L)", .v = "1.0", .rev = MX3x_CHIP_REV_1_0 },
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{ .srev = 0x10, .name = "i.MX31", .v = "1.1", .rev = MX3x_CHIP_REV_1_1 },
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{ .srev = 0x11, .name = "i.MX31L", .v = "1.1", .rev = MX3x_CHIP_REV_1_1 },
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{ .srev = 0x12, .name = "i.MX31", .v = "1.15", .rev = MX3x_CHIP_REV_1_1 },
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{ .srev = 0x13, .name = "i.MX31L", .v = "1.15", .rev = MX3x_CHIP_REV_1_1 },
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{ .srev = 0x14, .name = "i.MX31", .v = "1.2", .rev = MX3x_CHIP_REV_1_2 },
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{ .srev = 0x15, .name = "i.MX31L", .v = "1.2", .rev = MX3x_CHIP_REV_1_2 },
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{ .srev = 0x28, .name = "i.MX31", .v = "2.0", .rev = MX3x_CHIP_REV_2_0 },
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{ .srev = 0x29, .name = "i.MX31L", .v = "2.0", .rev = MX3x_CHIP_REV_2_0 },
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};
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void __init mx31_read_cpu_rev(void)
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@ -41,7 +41,7 @@ void __init mx31_read_cpu_rev(void)
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u32 i, srev;
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/* read SREV register from IIM module */
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srev = __raw_readl(IO_ADDRESS(IIM_BASE_ADDR + MXC_IIMSREV));
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srev = __raw_readl(MX31_IO_ADDRESS(MX31_IIM_BASE_ADDR + MXC_IIMSREV));
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for (i = 0; i < ARRAY_SIZE(mx31_cpu_type); i++)
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if (srev == mx31_cpu_type[i].srev) {
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@ -389,19 +389,6 @@ static inline int mx31_revision(void)
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#define MXC_INT_EXT_WDOG MX3x_INT_EXT_WDOG
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#define MXC_INT_EXT_TV MX3x_INT_EXT_TV
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#define PROD_SIGNATURE MX3x_PROD_SIGNATURE
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#define CHIP_REV_1_0 MX3x_CHIP_REV_1_0
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#define CHIP_REV_1_1 MX3x_CHIP_REV_1_1
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#define CHIP_REV_1_2 MX3x_CHIP_REV_1_2
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#define CHIP_REV_1_3 MX3x_CHIP_REV_1_3
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#define CHIP_REV_2_0 MX3x_CHIP_REV_2_0
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#define CHIP_REV_2_1 MX3x_CHIP_REV_2_1
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#define CHIP_REV_2_2 MX3x_CHIP_REV_2_2
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#define CHIP_REV_2_3 MX3x_CHIP_REV_2_3
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#define CHIP_REV_3_0 MX3x_CHIP_REV_3_0
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#define CHIP_REV_3_1 MX3x_CHIP_REV_3_1
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#define CHIP_REV_3_2 MX3x_CHIP_REV_3_2
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#define SYSTEM_REV_MIN MX3x_SYSTEM_REV_MIN
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#define SYSTEM_REV_NUM MX3x_SYSTEM_REV_NUM
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#endif
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#endif /* ifndef __MACH_MX3x_H__ */
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