forked from luck/tmp_suning_uos_patched
KVM: s390: fix delivery of vector regs during machine checks
Vector registers are only to be stored if the facility is available and if the guest has set up the machine check extended save area. If anything goes wrong while writing the vector registers, the vector registers are to be marked as invalid. Please note that we are allowed to write the registers although they are marked as invalid. Machine checks and "store status" SIGP orders are two different concepts, let's correctly separate these. As the SIGP part is completely handled in user space, we can drop it. This patch is based on a patch from Cornelia Huck. Reviewed-by: Cornelia Huck <cornelia.huck@de.ibm.com> Signed-off-by: David Hildenbrand <dahi@linux.vnet.ibm.com> Signed-off-by: Christian Borntraeger <borntraeger@de.ibm.com>
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@ -25,6 +25,7 @@
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#include <asm/isc.h>
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#include <asm/gmap.h>
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#include <asm/switch_to.h>
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#include <asm/nmi.h>
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#include "kvm-s390.h"
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#include "gaccess.h"
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#include "trace-s390.h"
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@ -406,8 +407,10 @@ static int __write_machine_check(struct kvm_vcpu *vcpu,
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{
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unsigned long ext_sa_addr;
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freg_t fprs[NUM_FPRS];
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union mci mci;
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int rc;
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mci.val = mchk->mcic;
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/* take care of lazy register loading via vcpu load/put */
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save_fpu_regs();
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save_access_regs(vcpu->run->s.regs.acrs);
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@ -415,7 +418,15 @@ static int __write_machine_check(struct kvm_vcpu *vcpu,
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/* Extended save area */
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rc = read_guest_lc(vcpu, __LC_VX_SAVE_AREA_ADDR, &ext_sa_addr,
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sizeof(unsigned long));
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rc |= kvm_s390_vcpu_store_adtl_status(vcpu, ext_sa_addr);
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/* Only bits 0-53 are used for address formation */
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ext_sa_addr &= ~0x3ffUL;
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if (!rc && mci.vr && ext_sa_addr && test_kvm_facility(vcpu->kvm, 129)) {
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if (write_guest_abs(vcpu, ext_sa_addr, vcpu->run->s.regs.vrs,
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512))
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mci.vr = 0;
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} else {
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mci.vr = 0;
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}
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/* General interruption information */
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rc |= put_guest_lc(vcpu, 1, (u8 __user *) __LC_AR_MODE_ID);
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@ -423,7 +434,7 @@ static int __write_machine_check(struct kvm_vcpu *vcpu,
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&vcpu->arch.sie_block->gpsw, sizeof(psw_t));
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rc |= read_guest_lc(vcpu, __LC_MCK_NEW_PSW,
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&vcpu->arch.sie_block->gpsw, sizeof(psw_t));
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rc |= put_guest_lc(vcpu, mchk->mcic, (u64 __user *) __LC_MCCK_CODE);
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rc |= put_guest_lc(vcpu, mci.val, (u64 __user *) __LC_MCCK_CODE);
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/* Register-save areas */
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if (MACHINE_HAS_VX) {
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@ -2837,38 +2837,6 @@ int kvm_s390_vcpu_store_status(struct kvm_vcpu *vcpu, unsigned long addr)
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return kvm_s390_store_status_unloaded(vcpu, addr);
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}
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/*
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* store additional status at address
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*/
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int kvm_s390_store_adtl_status_unloaded(struct kvm_vcpu *vcpu,
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unsigned long gpa)
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{
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/* Only bits 0-53 are used for address formation */
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if (!(gpa & ~0x3ff))
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return 0;
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return write_guest_abs(vcpu, gpa & ~0x3ff,
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(void *)&vcpu->run->s.regs.vrs, 512);
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}
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int kvm_s390_vcpu_store_adtl_status(struct kvm_vcpu *vcpu, unsigned long addr)
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{
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if (!test_kvm_facility(vcpu->kvm, 129))
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return 0;
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/*
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* The guest VXRS are in the host VXRs due to the lazy
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* copying in vcpu load/put. We can simply call save_fpu_regs()
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* to save the current register state because we are in the
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* middle of a load/put cycle.
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*
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* Let's update our copies before we save it into the save area.
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*/
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save_fpu_regs();
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return kvm_s390_store_adtl_status_unloaded(vcpu, addr);
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}
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static void __disable_ibs_on_vcpu(struct kvm_vcpu *vcpu)
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{
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kvm_check_request(KVM_REQ_ENABLE_IBS, vcpu);
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@ -273,10 +273,7 @@ int handle_sthyi(struct kvm_vcpu *vcpu);
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void kvm_s390_set_tod_clock(struct kvm *kvm, u64 tod);
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long kvm_arch_fault_in_page(struct kvm_vcpu *vcpu, gpa_t gpa, int writable);
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int kvm_s390_store_status_unloaded(struct kvm_vcpu *vcpu, unsigned long addr);
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int kvm_s390_store_adtl_status_unloaded(struct kvm_vcpu *vcpu,
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unsigned long addr);
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int kvm_s390_vcpu_store_status(struct kvm_vcpu *vcpu, unsigned long addr);
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int kvm_s390_vcpu_store_adtl_status(struct kvm_vcpu *vcpu, unsigned long addr);
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void kvm_s390_vcpu_start(struct kvm_vcpu *vcpu);
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void kvm_s390_vcpu_stop(struct kvm_vcpu *vcpu);
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void kvm_s390_vcpu_block(struct kvm_vcpu *vcpu);
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