The atomic64_add_unless function compares an atomic variable with
a given value and, if they are not equal, adds another given value
to the atomic variable. The function returns zero if the addition
did not occur and non-zero otherwise.
On ARM, the return value is initialised to 1 in C code. Inline assembly
code then performs the atomic64_add_unless operation, setting the
return value to 0 iff the addition does not occur. This means that
when the addition *does* occur, the value of ret must be preserved
across the inline assembly and therefore requires a "+r" constraint
rather than the current one of "=&r".
Thanks to Nicolas Pitre for helping to spot this.
Cc: stable@kernel.org
Reviewed-by: Nicolas Pitre <nicolas.pitre@linaro.org>
Signed-off-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
On i.MX35 the L2X0_AUX_CTRL register does not have sensible reset
default values. Allow them to be overwritten with the aux_val/aux_mask
arguments passed to l2x0_init().
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Acked-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* 'merge' of git://git.kernel.org/pub/scm/linux/kernel/git/benh/powerpc:
powerpc: Fix userspace build of ptrace.h
powerpc: Fix default_machine_crash_shutdown #ifdef botch
powerpc: Fix logic error in fixup_irqs
powerpc/iseries: Fix possible null pointer dereference in iSeries_pcibios_fixup_resources
powerpc: Linux cannot run with 0 cores
powerpc: Fix feature-fixup tests for gcc 4.5
powerpc: Disable SPARSE_IRQ by default
powerpc: Fix compile errors in prom_init_check for gcc 4.5
powerpc: Fix module building for gcc 4.5 and 64 bit
powerpc/perf_event: Fix for power_pmu_disable()
Build of ptrace.h failed for assembly because it
pulls in stdint.h.
Use exportable types (__u32, __u64) to avoid the dependency
on stdint.h.
Signed-off-by: Sam Ravnborg <sam@ravnborg.org>
Cc: Andrey Volkov <avolkov@varma-el.com>
Cc: Dave Kleikamp <shaggy@linux.vnet.ibm.com>
Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Acked-by: Dave Kleikamp <shaggy@linux.vnet.ibm.com>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
crash_kexec_wait_realmode() is defined only if CONFIG_PPC_STD_MMU_64
and CONFIG_SMP, but is called if CONFIG_PPC_STD_MMU_64 even if !CONFIG_SMP.
Fix the conditional compilation around the invocation.
Signed-off-by: Paul E. McKenney <paulmck@linux.vnet.ibm.com>
Acked-by: Michael Neuling <mikey@neuling.org>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
When SPARSE_IRQ is set, irq_to_desc() can
return NULL. While the code here has a
check for NULL, it's not really correct.
Fix it by separating the check for it.
This fixes CPU hot unplug for me.
Reported-by: Alastair Bridgewater <alastair.bridgewater@gmail.com>
Cc: stable@kernel.org [2.6.32+]
Signed-off-by: Johannes Berg <johannes@sipsolutions.net>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
I don't know if this is a right fix for the problem
since of_get_property can return NULL.
Since iseries_device_information is used only for informational purpose,
we can skip this function without valid HvSubBusNumber number.
Signed-off-by: Denis Kirjanov <dkirjanov@kernel.org>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
If we configure with CONFIG_SMP=n or set NR_CPUS less than the number of
SMT threads we will set the max cores property to 0 in the
ibm,client-architecture-support structure. On new versions of firmware that
understand this property it obliges and terminates our partition.
Use DIV_ROUND_UP so we handle not only the CONFIG_SMP=n case but also the
case where NR_CPUS isn't a multiple of the number of SMT threads.
Signed-off-by: Anton Blanchard <anton@samba.org>
Acked-by: Paul E. McKenney <paulmck@linux.vnet.ibm.com>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
The feature-fixup test declare some extern void variables and then take
their addresses. Fix this by declaring them as extern u8 instead.
Fixes these warnings (treated as errors):
CC arch/powerpc/lib/feature-fixups.o
cc1: warnings being treated as errors
arch/powerpc/lib/feature-fixups.c: In function 'test_cpu_macros':
arch/powerpc/lib/feature-fixups.c:293:23: error: taking address of expression of type 'void'
arch/powerpc/lib/feature-fixups.c:294:9: error: taking address of expression of type 'void'
arch/powerpc/lib/feature-fixups.c:297:2: error: taking address of expression of type 'void'
arch/powerpc/lib/feature-fixups.c:297:2: error: taking address of expression of type 'void'
arch/powerpc/lib/feature-fixups.c: In function 'test_fw_macros':
arch/powerpc/lib/feature-fixups.c:306:23: error: taking address of expression of type 'void'
arch/powerpc/lib/feature-fixups.c:307:9: error: taking address of expression of type 'void'
arch/powerpc/lib/feature-fixups.c:310:2: error: taking address of expression of type 'void'
arch/powerpc/lib/feature-fixups.c:310:2: error: taking address of expression of type 'void'
arch/powerpc/lib/feature-fixups.c: In function 'test_lwsync_macros':
arch/powerpc/lib/feature-fixups.c:321:23: error: taking address of expression of type 'void'
arch/powerpc/lib/feature-fixups.c:322:9: error: taking address of expression of type 'void'
arch/powerpc/lib/feature-fixups.c:326:3: error: taking address of expression of type 'void'
arch/powerpc/lib/feature-fixups.c:326:3: error: taking address of expression of type 'void'
arch/powerpc/lib/feature-fixups.c:329:3: error: taking address of expression of type 'void'
arch/powerpc/lib/feature-fixups.c:329:3: error: taking address of expression of type 'void'
Signed-off-by: Stephen Rothwell <sfr@canb.auug.org.au>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
The SPARSE_IRQ considerably adds overhead to critical path of IRQ
handling. However it doesn't benefit much in space for most systems with
limited IRQ_NR. Should be disabled unless really necessary.
Signed-off-by: Li Yang <leoli@freescale.com>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Just whitelist these extra compiler generated symbols.
Fixes these errors:
Error: External symbol '_restgpr0_14' referenced from prom_init.c
Error: External symbol '_restgpr0_20' referenced from prom_init.c
Error: External symbol '_restgpr0_22' referenced from prom_init.c
Error: External symbol '_restgpr0_24' referenced from prom_init.c
Error: External symbol '_restgpr0_25' referenced from prom_init.c
Error: External symbol '_restgpr0_26' referenced from prom_init.c
Error: External symbol '_restgpr0_27' referenced from prom_init.c
Error: External symbol '_restgpr0_28' referenced from prom_init.c
Error: External symbol '_restgpr0_29' referenced from prom_init.c
Error: External symbol '_restgpr0_31' referenced from prom_init.c
Error: External symbol '_savegpr0_14' referenced from prom_init.c
Error: External symbol '_savegpr0_20' referenced from prom_init.c
Error: External symbol '_savegpr0_22' referenced from prom_init.c
Error: External symbol '_savegpr0_24' referenced from prom_init.c
Error: External symbol '_savegpr0_25' referenced from prom_init.c
Error: External symbol '_savegpr0_26' referenced from prom_init.c
Error: External symbol '_savegpr0_27' referenced from prom_init.c
Error: External symbol '_savegpr0_28' referenced from prom_init.c
Error: External symbol '_savegpr0_29' referenced from prom_init.c
Error: External symbol '_savegpr0_31' referenced from prom_init.c
Signed-off-by: Stephen Rothwell <sfr@canb.auug.org.au>
Acked-by: Segher Boessenkool <segher@kernel.crashing.org>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Gcc 4.5 is now generating out of line register save and restore
in the function prefix and postfix when we use -Os.
Signed-off-by: Stephen Rothwell <sfr@canb.auug.org.au>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
When power_pmu_disable() removes the given event from a particular index into
cpuhw->event[], it shuffles down higher event[] entries. But, this array is
paired with cpuhw->events[] and cpuhw->flags[] so should shuffle them
similarly.
If these arrays get out of sync, code such as power_check_constraints() will
fail. This caused a bug where events were temporarily disabled and then failed
to be re-enabled; subsequent code tried to write_pmc() with its (disabled) idx
of 0, causing a message "oops trying to write PMC0". This triggers this bug on
POWER7, running a miss-heavy test:
perf record -e L1-dcache-load-misses -e L1-dcache-store-misses ./misstest
Signed-off-by: Matt Evans <matt@ozlabs.org>
Acked-by: Paul Mackerras <paulus@samba.org>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
* 'x86-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip:
rbtree: Undo augmented trees performance damage and regression
x86, Calgary: Limit the max PHB number to 256
* 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-linus: (22 commits)
MIPS: Return after handling coprocessor 2 exception
MIPS: BCM47xx: Add NVRAM support devices
MIPS: Loongson: Define rtc device on MC146818-equipped systems
MIPS: MT: Fix FPU affinity.
MIPS: Oprofile: Fixup of loongson2_exit()
MIPS: Alchemy: sleepcode without compile-time cputype dependencies
MIPS: Tracing: Cleanup of address space checking
MIPS: Tracing: Cleanup of function graph tracer
MIPS: Tracing: Reduce the overhead of dynamic Function Tracer
MIPS: Tracing: Cleanup of instructions used
MIPS: Tracing: Fix 32-bit support with -mmcount-ra-address
MIPS: Tracing: Fix argument passing of the 32bit support with gcc 4.5
MIPS: Tracing: Cleanup comments
MIPS: Tracing: Cleanup the arguments passing of prepare_ftrace_return
MIPS: Tracing: Merge adjacent #ifdefs with same condition.
MIPS: AR7, BCM63xx: fix gpio_to_irq() return value
MIPS: Restore signalling NaN behaviour for abs.[sd]
MIPS: Loongson: CS5536: Fix ISA support
MIPS: Loongson: Add a missing break statement in CS5536 IDE code
MIPS: Loongson: CS5536: Add missing RDMSRs for IDE and USB
...
Breaking here dropped us to the default code which always sends a SIGILL
to the current process, no matter what the CU2 notifier says.
[Ralf: Currently this only hurts on Cavium and possibly some out of tree
platforms.]
Signed-off-by: Jesper Nilsson <jesper@jni.nu>
To: linux-mips@linux-mips.org
To: linux-kernel@vger.kernel.org
Patchwork: http://patchwork.linux-mips.org/patch/1391/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
When trying to netboot a Linksys WRT54GS WLAN router, the bootup fails,
because of following error message:
...
[ 0.424000] b44: b44.c:v2.0
[ 0.424000] b44: Invalid MAC address found in EEPROM
[ 0.432000] b44 ssb0:1: Problem fetching invariants of chip,aborting
[ 0.436000] b44: probe of ssb0:1 failed with error -22
...
The router uses a CFE bootloader, but most of the needed environment
variables for network card initialization, are not available from CFE
via printenv and even though not via cfe_getenv().
The required environment variables are saved in a special partition
in flash memory. The attached patch implement nvram_getenv and enables
bootup via NFS root on my router.
Most of the patch is extracted from the OpenWrt subversion repository and
stripped down and cleaned up to just fix this issue.
[Ralf: sorted out header file inclusions. Lots of unneded headers and such
that should have been included.]
Signed-off-by: Waldemar Brodkorb <wbx@openadk.org>
Reviewed-by: Phil Sutter <phil@nwl.cc>
To: linux-mips@linux-mips.org
Cc: Hauke Mehrtens <hauke@hauke-m.de>
Patchwork: http://patchwork.linux-mips.org/patch/1359/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
This patch declare the rtc device present on systems with clock compatible
with the mc146818 and handled by rtc-cmos. Introduce a new Kconfig entry
because there are some systems without rtc_cmos compatible clock.
Signed-off-by: Arnaud Patard <apatard@mandriva.com>
To: linux-mips@linux-mips.org
Cc: aba@not.so.argh.org
Patchwork: http://patchwork.linux-mips.org/patch/1320/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
The fragile MT sys_sched_setaffinity wrapper needs its regular dose of
fixes.
Nose-poked-at-pile-o-crap-by: Julia Lawall <julia@diku.dk>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
When exiting from loongson2_exit(), we need to reset the counter
register too, this patch adds a function reset_counters() to do it, by
the way, this function will be shared by Perf.
Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com>
Cc: linux-mips@linux-mips.org
Patchwork: http://patchwork.linux-mips.org/patch/1199/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Split the low-level sleepcode into per-cpu functions instead of
relying on compile-time-defined cpu type.
Signed-off-by: Manuel Lauss <manuel.lauss@gmail.com>
To: Linux-MIPS <linux-mips@linux-mips.org>
Patchwork: http://patchwork.linux-mips.org/patch/1281/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
This patch adds an inline function in_module() to check which space the
instruction pointer in, kernel space or module space.
Note: This will not work when the kernel space and module space are the
same. If they are the same, we need to modify scripts/recordmcount.pl,
ftrace_make_nop/call() and the other related parts to ensure the
enabling/disabling of the calling site to _mcount is right for both
kernel and module.
[Ralf: It also is still incorrect for some 64-bit kernels.]
Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com>
Cc: linux-mips <linux-mips@linux-mips.org>
Cc: David Daney <david.s.daney@gmail.com>
Patchwork: http://patchwork.linux-mips.org/patch/1232/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
With the help of uasm this patch encodes the instructions of the dynamic
function tracer in ftrace_dyn_arch_init() when initializing it.
As a result we can remove the dynamic encoding of instructions in
ftrace_make_nop()/call(), ftrace_enable_ftrace_graph_caller() and remove
the macro jump_insn_encode() and at last this reduce the overhead of
dynamic Function Tracer. This also is cleaner.
Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com>
Cc: linux-mips <linux-mips@linux-mips.org>
Cc: David Daney <david.s.daney@gmail.com>
Patchwork: http://patchwork.linux-mips.org/patch/1230/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
This patch adds some cleanups of the instructions:
o use macros instead of magic numbers
o use macros instead of variables to reduce some overhead
o add new macro for the jal instruction
Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com>
Cc: linux-mips <linux-mips@linux-mips.org>
Cc: David Daney <david.s.daney@gmail.com>
Patchwork: http://patchwork.linux-mips.org/patch/1229/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
For 32-bit kernel the -mmcount-ra-address option of gcc 4.5 emits one
extra instruction before calling to _mcount so we need to use a different
"b 1f" for it.
Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com>
Cc: linux-mips <linux-mips@linux-mips.org>
Cc: David Daney <david.s.daney@gmail.com>
Patchwork: http://patchwork.linux-mips.org/patch/1228/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
As documented in the GCC 4.5 docs [1] -mmcount-ra-address uses register
$12 to pass the stack offset of the return address to the _mcount function.
On 64-bit kernels $12 is t0 but in 32-bit kernels it is t4 so we need to
use $12 instead of t0 here to be correct for both kernel types.
[1] GCC documentation: MIPS Options
http://gcc.gnu.org/onlinedocs/gcc/MIPS-Options.html
Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com>
Cc: linux-mips <linux-mips@linux-mips.org>
Cc: David Daney <david.s.daney@gmail.com>
Patchwork: http://patchwork.linux-mips.org/patch/1227/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
The return value of gpio_to_irq() is not a pointer but an integer.
Signed-off-by: Yoichi Yuasa <yuasa@linux-mips.org>
Cc: linux-mips <linux-mips@linux-mips.org>
Patchwork: http://patchwork.linux-mips.org/patch/1280/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Atsushi Nemoto <anemo@mba.ocn.ne.jp> spotted that this had been incorrectly
removed in a previous patch
Signed-off-by: Chris Dearman <chris@mips.com>
To: linux-mips@linux-mips.org
Patchwork: http://patchwork.linux-mips.org/patch/1213/
Tested-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
The function _wrmsr() called by divil_lbar_disable()/enable() should be
called with the offset as the argument.
Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com>
Cc: linux-mips@linux-mips.org
Cc: Zhang Le <r0bertz@gentoo.org>
Patchwork: http://patchwork.linux-mips.org/patch/1252/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Add several missing RDMSRs for IDE and USB are missing to avoid the
agressive modification of the high 32 bits of the MSR.
Without this patch some usb devices may fail after printing "reset ehci
host ....." when reading the partition information.
Signed-off-by: Hu Hongbing <huhb@lemote.com>
Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com>
Cc: linux-mips@linux-mips.org
Cc: Zhang Le <r0bertz@gentoo.org>
Cc: Hu Hongbing <huhb@lemote.com>
Patchwork: http://patchwork.linux-mips.org/patch/1250/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
PORT_AR7 has the correct TRIG flag (UART_FCR_R_TRIG_00) as well as
UART_CAP_AFE being set. This fixes UART on TNETD7300 revision 0x02,
which would otherwise mangle some characters, no side effects on
other revisions.
Signed-off-by: Florian Fainelli <florian@openwrt.org>
To: linux-mips@linux-mips.org
Patchwork: http://patchwork.linux-mips.org/patch/1246/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Reimplement augmented RB-trees without sprinkling extra branches
all over the RB-tree code (which lives in the scheduler hot path).
This approach is 'borrowed' from Fabio's BFQ implementation and
relies on traversing the rebalance path after the RB-tree-op to
correct the heap property for insertion/removal and make up for
the damage done by the tree rotations.
For insertion the rebalance path is trivially that from the new
node upwards to the root, for removal it is that from the deepest
node in the path from the to be removed node that will still
be around after the removal.
[ This patch also fixes a video driver regression reported by
Ali Gholami Rudi - the memtype->subtree_max_end was updated
incorrectly. ]
Acked-by: Suresh Siddha <suresh.b.siddha@intel.com>
Acked-by: Venkatesh Pallipadi <venki@google.com>
Signed-off-by: Peter Zijlstra <a.p.zijlstra@chello.nl>
Tested-by: Ali Gholami Rudi <ali@rudi.ir>
Cc: Fabio Checconi <fabio@gandalf.sssup.it>
Cc: "H. Peter Anvin" <hpa@zytor.com>
Cc: Andrew Morton <akpm@linux-foundation.org>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
LKML-Reference: <1275414172.27810.27961.camel@twins>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
This patch fixes on wrong function name in include/plat/sdhci.h for Samsung.
The 's5pc100_default_sdhci0()' function should be chnaged to
's5pv210_default_sdhci0()'. Because 's5pv210_default_sdhci0()' must be pair.
Signed-off-by: Hyuk Lee <hyuk1.lee@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
The S5P6442 PLL setting announce message incorrectly displays S5P6440
as the SoC. Change it to S5P6442.
Signed-off-by: Thomas Abraham <thomas.ab@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
This patch fixes the following compilation problem if only NCP machine
is selected:
arch/arm/mach-s3c64xx/s3c6410.c: In function 's3c6410_map_io':
arch/arm/mach-s3c64xx/s3c6410.c:51: error: implicit declaration of function 's3c6410_default_sdhci2'
And also adds missed 's3c6400_default_sdhci2'.
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
[kgene.kim@samsung.com: minor title fix and added comments]
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
1. Corrected shift values of I2S and UART clocks (CLK_GATE_IP3), which were
defined incorrectly.
2. Corrected shift values of sclk_audio, uclk1, sclk_fimd, sclk_mmc,
sclk_spi, sclk_pwm, which had duplicated .enable/.ctrlbit with their
twins defined in struct clk init_clocks_disable[] and struct clk
init_clocks[]. We've changed their .enable/.ctrlbit to use CLK_SRC_MASK
register to avoid the duplicated clock problem described below.
NOTE: Duplicated Clock Problem
Please note that each clock definition should access different control
register; otherwise, the system may suffer lockups. For example, if we
have two clock definitions "a" and "b" which access the same register
(and the shift value). Then, when we do:
module A
clk = clk_get("a");
clk->clk_enable(clk);
module B (context switch)
clk = clk_get("b");
clk->clk_enable(clk);
do something with clk.
clk->clk_disable(clk);
module A (context switch)
do something with clk
* At this point, the system may hang.
Therefore, there should be no clock definitions with the same contol
register/shift. If we need to create "aliases", then, creating child
clocks sharing the clock should be fine.
3. Corrected other sclk_* shift values and access registers.
Signed-off-by: MyungJoo Ham <myungjoo.ham@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
[kgene.kim@samsung.com: minor title and message fix]
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
This patch fixes bug on eint type set function, s5p_irq_eint_set_type().
In the IRQ_TYPE_EDGE_FALLING case, S5P_EXTINT_FALLEDGE is right
instead of S5P_EXTINT_RISEEDGE
Signed-off-by: Boojin Kim <boojin.kim@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
* master.kernel.org:/home/rmk/linux-2.6-arm:
ARM: 6205/1: perf: ensure counter delta is treated as unsigned
ARM: 6202/1: Do not ARM_DMA_MEM_BUFFERABLE on RealView boards with L210/L220
ARM: 6201/1: RealView: Do not use outer_sync() on ARM11MPCore boards with L220
ARM: 6195/1: OMAP3: pmu: make CPU_HAS_PMU dependent on OMAP3_EMU
ARM: 6194/1: change definition of cpu_relax() for ARM11MPCore
ARM: 6193/1: RealView: Align the machine_desc.phys_io to 1MB section
ARM: 6192/1: VExpress: Align the machine_desc.phys_io to 1MB section
ARM: 6188/1: Add a config option for the ARM11MPCore DMA cache maintenance workaround
ARM: 6187/1: The v6_dma_inv_range() function must preserve data on SMP
ARM: 6186/1: Avoid the CONSISTENT_DMA_SIZE warning on noMMU builds
ARM: mx3: mx31lilly: fix build error for !CONFIG_USB_ULPI
[ARM] mmp: fix build failure due to IRQ_PMU depends on ARCH_PXA
[ARM] pxa/mioa701: fix camera regression
[ARM] pxa/z2: fix flash layout to final version
[ARM] pxa/z2: fix missing include in battery driver
[ARM] pxa: fix incorrect gpio type in udc_pxa2xx.h
* 'perf-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip:
perf, x86: Fix incorrect branches event on AMD CPUs
perf tools: Fix find tids routine by excluding "." and ".."
x86: Send a SIGTRAP for user icebp traps
Hardware performance counters on ARM are 32-bits wide but atomic64_t
variables are used to represent counter data in the hw_perf_event structure.
The armpmu_event_update function right-shifts a signed 64-bit delta variable
and adds the result to the event count. This can lead to shifting in sign-bits
if the MSB of the 32-bit counter value is set. This results in perf output
such as:
Performance counter stats for 'sleep 20':
18446744073460670464 cycles <-- 0xFFFFFFFFF12A6000
7783773 instructions # 0.000 IPC
465 context-switches
161 page-faults
1172393 branches
20.154242147 seconds time elapsed
This patch ensures that the delta value is treated as unsigned so that the
right shift sets the upper bits to zero.
Cc: <stable@kernel.org>
Acked-by: Jamie Iles <jamie.iles@picochip.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
While doing some performance counter validation tests on some
assembly language programs I noticed that the "branches:u"
count was very wrong on AMD machines.
It looks like the wrong event was selected.
Signed-off-by: Vince Weaver <vweaver1@eecs.utk.edu>
Acked-by: Peter Zijlstra <a.p.zijlstra@chello.nl>
Cc: Paul Mackerras <paulus@samba.org>
Cc: Arnaldo Carvalho de Melo <acme@redhat.com>
Cc: Robert Richter <robert.richter@amd.com>
Cc: Borislav Petkov <borislav.petkov@amd.com>
Cc: Frederic Weisbecker <fweisbec@gmail.com>
Cc: <stable@kernel.org>
LKML-Reference: <alpine.DEB.2.00.1007011526010.23160@cl320.eecs.utk.edu>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
RealView boards with certain revisions of the L210/L220 cache controller
may have issues (hardware deadlock) with the mandatory barriers (DSB
followed by an L2 cache sync) when ARM_DMA_MEM_BUFFERABLE is enabled.
The patch disables ARM_DMA_MEM_BUFFERABLE for these boards.
Tested-by: Linus Walleij <linus.walleij@stericsson.com>
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
RealView boards with certain revisions of the L220 cache controller (ARM11*
processors only) may have issues (hardware deadlock) with the recent changes to
the mb() barrier implementation (DSB followed by an L2 cache sync). The patch
redefines the RealView ARM11MPCore mandatory barriers without the outer_sync()
call.
Cc: <stable@kernel.org>
Tested-by: Linus Walleij <linus.walleij@stericsson.com>
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
