Commit Graph

637075 Commits

Author SHA1 Message Date
Tomi Valkeinen
e43f2c3395 drm/omap: fix primary-plane's possible_crtcs
We set the possible_crtc for all planes to "(1 << priv->num_crtcs) - 1",
which is fine as the HW planes can be used fro all crtcs. However, when
we're doing that, we are still incrementing 'num_crtcs', and we'll end
up with bad possible_crtcs, preventing the use of the primary planes.

This patch passes a possible_crtcs mask to plane init function so that
we get correct possible_crtc.

Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
2016-12-08 13:42:57 +02:00
Tomi Valkeinen
5cd57a46e3 drm: fix possible_crtc's type
drm_universal_plane_init() and drm_plane_init() take "unsigned long
possible_crtcs" parameter, but then stuff it into uint32_t. Change the
parameter to uint32_t.

Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
2016-12-08 13:42:57 +02:00
Chris Wilson
72a93e8dd5 drm: Take ownership of the dmabuf->obj when exporting
Currently the reference for the dmabuf->obj is incremented for the
dmabuf in drm_gem_prime_handle_to_fd() (at the high level userspace
interface), but is released in drm_gem_dmabuf_release() (the lowlevel
handler). Improve the symmetry of the dmabuf->obj ownership by acquiring
the reference in drm_gem_dmabuf_export(). This makes it easier to use
the prime functions directly.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
[danvet: Update kerneldoc.]
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Link: http://patchwork.freedesktop.org/patch/msgid/20161207214527.22533-1-chris@chris-wilson.co.uk
2016-12-08 10:29:22 +01:00
Daniel Vetter
f3f4c4d68a drm: Allow CAP_PRIME on !MODESET
vgem (and our igt tests using vgem) need this. I suspect etnaviv will
fare similarly.

v2. Make it build. Oops.

Fixes: d5264ed382 ("drm: Return -ENOTSUPP when called for KMS cap with a non-KMS driver")
Cc: Michel Dänzer <michel.daenzer@amd.com>
Cc: Alex Deucher <alexander.deucher@amd.com>
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Signed-off-by: Daniel Vetter <daniel.vetter@intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/20161207144939.22756-1-daniel.vetter@ffwll.ch
2016-12-08 10:00:15 +01:00
Dave Airlie
e783fd0cdc Add support for the Amlogic Meson Video Processing Unit
- Only CVBS/Composite output for Amlogic Meson GXBB/GXL/GXM SoCs
 - Add MAINTAINERS entry
 - Add DT bindings documentation
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1
 
 iQIcBAABAgAGBQJYRn0RAAoJEHfc29rIyEnR2PAQAIfgdJL1BiR/37BxFyR837e0
 kFBlYcb4GDxfIT3ZKSrleullwDz7m7VoDmxmKRpq7UiDtt8e3CupD2jCU+NN0FY2
 mFIlYSnCV+MSAeoakjfKqbP30n15iOw9s5ty5jbkkF4zLRn5vuLX8WSG0PbrYjZv
 0Tcz6aavvusgqf830fCWt/+BxgYQURaE1iUYRc8qC7a4BoQVdZpuhP6v5waJTztW
 FaM8f7W45usxoejQ6gL095toHGY6UxuvV+kn9b7a6mW27eZZY3YhMRFnsywNTv/k
 5NAa7vgEMYAb26nxSMcTeKnI7GxwyYQ9KXmtLB7RiGfC2/uIrNOSo8Gpu5IXpvRe
 ge/Zt8GXmqvHHkN64/LyloOQLSYVRWdhhz8KfPKmK/yaaZhjDUkqekq8PASlv5Rs
 7dWsgTlTwioqByycwkJSWlNcu/UpNQxWS6FC8tiDmRE5CMiTQuFbnilij83W4nj0
 cDiN4LWrW14gFGLnLpteMiaPFylIRtd9rd1AFEsXi5zM8FbyFmj+rKOvHiRwxf2h
 jW9UBDPj/g1BhNrjXYetPCxQoEYc0XIFpjXTqbd//F2lETCXPgDQybZ+nkrHoIfM
 ZEjc5ER2A25zo2k7aCxgtRkEDJM2HPEBqnqTEQ2kXNrZjYpkfa5SnHAzGASjcLfe
 0efKP1+O05AWPHMbWjTE
 =rrKt
 -----END PGP SIGNATURE-----

Merge tag 'meson-drm-for-4.10' of github.com:superna9999/linux into drm-next

Add support for the Amlogic Meson Video Processing Unit
- Only CVBS/Composite output for Amlogic Meson GXBB/GXL/GXM SoCs
- Add MAINTAINERS entry
- Add DT bindings documentation

* tag 'meson-drm-for-4.10' of github.com:superna9999/linux:
  MAINTAINERS: add entry for Amlogic DRM drivers
  dt-bindings: display: add Amlogic Meson DRM Bindings
  drm: Add support for Amlogic Meson Graphic Controller
2016-12-08 10:35:52 +10:00
Dave Airlie
3eff97b2d6 Merge tag 'drm-intel-next-fixes-2016-12-07' of git://anongit.freedesktop.org/git/drm-intel into drm-next
first set of fixes for -next.

* tag 'drm-intel-next-fixes-2016-12-07' of git://anongit.freedesktop.org/git/drm-intel:
  drm/i915: Move priority bumping for flips earlier
  drm/i915: Hold a reference on the request for its fence chain
  drm/i915/audio: fix hdmi audio noise issue
  drm/i915/debugfs: Increment return value of gt.next_seqno
  drm/i915/debugfs: Drop i915_hws_info
  drm/i915: Initialize dev_priv->atomic_cdclk_freq at init time
  drm/i915: Fix cdclk vs. dev_cdclk mess when not recomputing things
  drm/i915: Make skl_write_{plane,cursor}_wm() static
  drm/i915: Complete requests in nop_submit_request
  drm/i915/gvt: fix lock not released bug for dispatch_workload() err path
  drm/i915/gvt: fix getting 64bit bar size error
  drm/i915/gvt: fix missing init param.primary
2016-12-08 10:33:26 +10:00
Marek Vasut
8166255704 drm: mxsfb: Select DRM_PANEL
Select DRM_PANEL, since the MXSFB driver depends on it. Otherwise,
we get the following error when compiling:

drivers/built-in.o: In function `mxsfb_probe':
core.c:(.text+0x9ce9c): undefined reference to `drm_panel_attach'
core.c:(.text+0x9cff0): undefined reference to `drm_panel_detach'
drivers/built-in.o: In function `mxsfb_panel_connector_destroy':
core.c:(.text+0x9d614): undefined reference to `drm_panel_detach'
drivers/built-in.o: In function `mxsfb_create_output':
core.c:(.text+0x9d68c): undefined reference to `of_drm_find_panel'
make: *** [Makefile:962: vmlinux] Error 1

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Daniel Vetter <daniel.vetter@ffwll.ch>
Cc: Dave Airlie <airlied@redhat.com>
Reported-by: Stefan Agner <stefan@agner.ch>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2016-12-08 10:25:37 +10:00
Gustavo Padovan
35f8cc3b9a drm/fence: add drm_crtc_create_fence()
Instead of dealing with crtc details inside drm_atomic.c we should
just export a function that creates a new crtc fence for us and
use that.

Suggested-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Gustavo Padovan <gustavo.padovan@collabora.co.uk>
Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Link: http://patchwork.freedesktop.org/patch/msgid/1481046437-18778-1-git-send-email-gustavo@padovan.org
2016-12-07 11:16:55 -02:00
zain wang
8f34a54871 drm/bridge: analogix: Don't return -EINVAL when panel doesn't support PSR
We will ignored PSR setting if panel not support it. So, in this case,
we should return from analogix_dp_enable/disable_psr() without any
error code. Let's retrun 0 instead of -EINVAL when panel not support PSR
in analogix_dp_enable/disable_psr().

Signed-off-by: zain wang <wzz@rock-chips.com>
Signed-off-by: Archit Taneja <architt@codeaurora.org>
Link: http://patchwork.freedesktop.org/patch/msgid/1481072253-8917-1-git-send-email-wzz@rock-chips.com
2016-12-07 08:27:36 +05:30
Huang Rui
ff9d646017 drm/amdgpu: update golden setting of tonga
Signed-off-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Ken Wang <Qingqing.Wang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-12-06 18:08:41 -05:00
Alex Deucher
5a23f27205 drm/amdgpu/si: load the proper firmware on 0x87 oland boards
New variant.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
2016-12-06 18:08:40 -05:00
Alex Deucher
ce66cb1e9c drm/amdgpu: add additional pci revision to dpm workaround
New variant.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
2016-12-06 18:08:40 -05:00
Alex Deucher
abb2e3c1ce drm/radeon/si: load the proper firmware on 0x87 oland boards
New variant.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
2016-12-06 18:08:39 -05:00
Alex Deucher
8729675c00 drm/radeon: add additional pci revision to dpm workaround
New variant.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
2016-12-06 18:08:38 -05:00
Xiangliang Yu
e9efaaa047 drm/amd/powerplay: Fix potential NULL pointer issue
If doesn't enable dpm, the powerplay will not allocate memory for
hw management. So, hw_init_power_state_table function will reference
NULL pointer when resetting.

Signed-off-by: Xiangliang Yu <Xiangliang.Yu@amd.com>
Reviewed-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
2016-12-06 18:08:38 -05:00
Xiangliang Yu
84f3f05b44 drm/amdgpu: Don't touch GFX hw during HW fini
For SR-IOV client, driver shouldn't touch the GFX hw during HW
fini, otherwise, gfx will fail to start after rebooting guest os.

Signed-off-by: shaoyunl <Shaoyun.Liu@amd.com>
Signed-off-by: Xiangliang Yu <Xiangliang.Yu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Monk Liu <Monk.Liu@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-12-06 18:08:37 -05:00
Xiangliang Yu
c7fac7dc1d drm/amd/powerplay: Adjust the position of data size initial
Put the initial part close to memory allocate, it will make code
more clear.

Signed-off-by: Xiangliang Yu <Xiangliang.Yu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-12-06 18:08:36 -05:00
Xiangliang Yu
e224e4f17d drm/amd/powerplay: Ignore smu buffer usage
SMU buffer is used for power feature, but for virtualization, the
power is controlled by hypervisor. Ignore it.

Signed-off-by: Xiangliang Yu <Xiangliang.Yu@amd.com>
Signed-off-by: Monk Liu <Monk.Liu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-12-06 18:08:36 -05:00
Xiangliang Yu
ed91dd49ba drm/amd/powerplay: cut digest part
For virtualization, FW size need to cut its digest part.

Signed-off-by: Frank Min <Frank.Min@amd.com>
Signed-off-by: Monk Liu <Monk.Liu@amd.com>
Signed-off-by: Xiangliang Yu <Xiangliang.Yu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-12-06 18:08:35 -05:00
Xiangliang Yu
aeab203205 drm/amdgpu: drop redundant vi_mqd define
Vi_structs.h has defined vi_mqd, drop redundant vi_mqd define.

Signed-off-by: Monk Liu <Monk.Liu@amd.com>
Signed-off-by: Xiangliang Yu <Xiangliang.Yu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-12-06 18:08:34 -05:00
Flora Cui
47e50d5c0d drm/amdgpu: fix gtt available page num accounting
Signed-off-by: Flora Cui <Flora.Cui@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-12-06 18:08:34 -05:00
Hawking Zhang
10e2ca346b drm/amd/powerplay: bypass fan table setup if no fan connected
If vBIOS noFan bit is set, the fan table parameters in thermal controller
will not get initialized. The driver should avoid to use these uninitialized
parameter to do calculation. Otherwise, it may trigger divide 0 error.

Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
2016-12-06 18:08:33 -05:00
Alex Xie
1cd99a8d97 drm/amd/amdgpu: validate the shadow BO.
Fixes a rare NULL pointer dereference in amdgpu_ttm_bind.

The issue was found by Nicolai Haehnle.
The patch was tested by Nicolai Haehnle.

Signed-off-by: Alex Xie <AlexBin.Xie@amd.com>
Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
2016-12-06 18:08:32 -05:00
Rex Zhu
f5f857f45d drm/amd/powerplay: disable cg pg task when pp uninitialize.
fix bug on uvd pg enabled, when reboot vm in pass through case,
we need to notify smu power up uvd/vce if they were power down.
otherwise, the vbios post will fail.

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-12-06 18:08:32 -05:00
Rex Zhu
8201a67a49 drm/amdgpu: no need to ungate uvd/vce clock when fini.
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-12-06 18:08:31 -05:00
Michel Dänzer
6b16cf7785 drm/radeon: Hide the HW cursor while it's out of bounds
Fixes hangs in that case under some circumstances.

v2:
* Only use non-0 x/yorigin if the cursor is (partially) outside of the
  top/left edge of the total surface with AVIVO/DCE

Bugzilla: https://bugzilla.suse.com/show_bug.cgi?id=1000433
Cc: stable@vger.kernel.org
Signed-off-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com> (v1)
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-12-06 18:08:30 -05:00
Michel Dänzer
4349bd775c drm/radeon: Always store CRTC relative radeon_crtc->cursor_x/y values
We were storing viewport relative coordinates for AVIVO/DCE display
engines. However, radeon_crtc_cursor_set2 and radeon_cursor_reset pass
radeon_crtc->cursor_x/y as the x/y parameters of
radeon_cursor_move_locked, which would break if the CRTC isn't located
at (0, 0).

Cc: stable@vger.kernel.org
Signed-off-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-12-06 18:08:30 -05:00
Michel Dänzer
dcab0fa64e drm/radeon: Also call cursor_move_locked when the cursor size changes
The cursor size also affects the register programming.

Cc: stable@vger.kernel.org
Signed-off-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-12-06 18:08:29 -05:00
Michel Dänzer
7c83d7abc9 drm/amdgpu: Only update the CUR_SIZE register when necessary
Normally only necessary when the cursor size changes.

Signed-off-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-12-06 18:08:28 -05:00
Michel Dänzer
8b02cde994 drm/amdgpu: Also call cursor_move_locked when the cursor size changes
The cursor size also affects the register programming.

Cc: stable@vger.kernel.org
Signed-off-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-12-06 18:08:28 -05:00
Michel Dänzer
8e57ec613d drm/amdgpu: Store CRTC relative amdgpu_crtc->cursor_x/y values
We were storing viewport relative coordinates. However, crtc_cursor_set2
and cursor_reset pass amdgpu_crtc->cursor_x/y as the x/y parameters of
cursor_move_locked, which would break if the CRTC isn't located at
(0, 0).

Cc: stable@vger.kernel.org
Signed-off-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-12-06 18:08:27 -05:00
Arindam Nath
dd31ae9ac9 drm/amd/amdgpu: enable GUI idle INT after enabling CGCG
GUI idle interrupts should be enabled only after we
have enabled coarse grain clock gating (CGCG). This
prevents GFX engine generating idle interrupt even
though CGCG is not completely enabled.

Most of the time this goes un-noticed, but on some
Stoney ASICs this results in GFX engine hang after
system resumes from suspend. The issue is not
particular to Stoney though and could have occured
on any ASIC. The patch fixes this issue.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reported-by: Sunil Uttarwar <Sunil.Uttarwar1@amd.com>
Signed-off-by: Arindam Nath <arindam.nath@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
2016-12-06 18:08:26 -05:00
Maruthi Srinivas Bayyavarapu
ecc2cf7cc8 drm/amdgpu: enable VCE clockgating in Polaris-10/11
VCE clocks are set to be disabled, when not in use.

Signed-off-by: Maruthi Bayyavarapu <maruthi.bayyavarapu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-12-06 18:08:26 -05:00
Rex Zhu
ddbc2594cc drm/amdgpu: fix CI bug uvd status not true in debugfs.
can't get uvd's state by uvd_enabled. uvd_enabled
is used for request higher mclk.
in multi-display case, mclk has been in highest clock,
no matter uvd's state changed, uvd_enabled will not
be changed.

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-12-06 18:08:25 -05:00
Xiangliang Yu
188a301fd7 drm/amdgpu: remove error message when loading driver
Forget to check UCODE_ID_STORAGE case and will cause to print error
message when loading driver, correct it.

Signed-off-by: Xiangliang Yu <Xiangliang.Yu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-12-06 18:08:24 -05:00
Xiangliang Yu
7047391fab drm/amd/powerplay: fix firmware loading failure
For virtualization, firmware loading need the firmware version info,
and will load the right firmware. So, transfer fw_version to toc.

Signed-off-by: Frank Min <Frank.Min@amd.com>
Signed-off-by: Monk Liu <Monk.Liu@amd.com>
Signed-off-by: Xiangliang Yu <Xiangliang.Yu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-12-06 18:08:24 -05:00
Rex Zhu
3c3a7e616c drm/amdgpu: fix bug mclk can't change on Polaris
the root cause is we gate the clock to uvd vcpu.
mclk's change should need the response from uvd if
it is power on.

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-12-06 18:08:23 -05:00
Rex Zhu
805b3ba87d drm/amdgpu: refine uvd 6.0 clock gate feature.
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-12-06 18:08:22 -05:00
Alex Deucher
ad3b961423 drm/amdgpu/gfx8: move eop programming per queue
It's per queue not per pipe.

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-12-06 18:08:22 -05:00
Alex Deucher
70b5c5aae5 Revert "drm/amdgpu: use the kernel zone memory size as the max remote memory in amdgpu"
This reverts commit a693e050ed.

This breaks on systems with huge amounts of system memory as we do not have
enough vram to store the page tables.  Additionally, this is less of an issue
with the recent gtt manager changes.

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-12-06 18:08:21 -05:00
Gustavo Padovan
db444e1344 drm/atomic: doc: remove old comment about nonblocking commits
We now support nonblocking commits on drm_atomic_helper_commit()
so the comment is not valid anymore.

Signed-off-by: Gustavo Padovan <gustavo.padovan@collabora.co.uk>
Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Link: http://patchwork.freedesktop.org/patch/msgid/1480946626-30917-1-git-send-email-gustavo@padovan.org
2016-12-06 16:28:30 -02:00
Lucas Stach
8c31f6034b drm/panel: simple: Add support for AUO G185HAN01
This adds support for the AU Optronics G185HAN01 18.5" LVDS FullHD TFT
LCD panel, which can be supported by the simple panel driver.

Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2016-12-06 17:06:32 +01:00
Lucas Stach
697035c6b8 drm/panel: simple: Add support for AUO G133HAN01
This adds support for the AU Optronics G133HAN01 13.3" LVDS FullHD TFT
LCD panel, which can be supported by the simple panel driver.

Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2016-12-06 17:06:31 +01:00
Lucas Stach
4ae13e4868 drm/panel: simple: Add more properties to Innolux G121I1-L01
Convert from a single mode to display timings, which allow to describe
the minimum/maximium blanking and clock rates, add enable/disable delays
and provide the bus format.

Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2016-12-06 16:55:44 +01:00
zain wang
5466a631b2 drm/panel: simple: Add bits-per-component for Sharp LQ123P1JX31
The Sharp LQ123P1JX31 panel support 8 bits per component.

Signed-off-by: zain wang <wzz@rock-chips.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2016-12-06 16:52:32 +01:00
Chen-Yu Tsai
230c5b4423 drm/panel: simple: Check against num_timings when setting preferred for timing
In the loop on .timings, we should check .num_timings to see if it's the
only mode specified, not .num_modes, which should be used with .modes.

Fixes: cda553725c ("drm/panel: simple: Set appropriate mode type")
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2016-12-06 16:47:07 +01:00
Randy Li
2cb35c802a drm/panel: Add support for Chunghwa CLAA070WP03XG panel
The Chunghwa CLAA070WP03XG is a 7" 1280x800 panel, which can be
supported by the simple panel driver.

Signed-off-by: Randy Li <ayaka@soulik.info>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2016-12-06 16:43:55 +01:00
Mauro Carvalho Chehab
9e22ff439f Update Documentation/00-INDEX
Em Mon, 5 Dec 2016 14:23:01 -0700
Jonathan Corbet <corbet@lwn.net> escreveu:

> On Mon,  5 Dec 2016 09:41:40 -0200
> Mauro Carvalho Chehab <mchehab@s-opensource.com> wrote:
>
> > So, in order to check it, I wrote a small script that compares the files
> > and directories at Documentation/ with the ones at 00-INDEX.
> >
> > Then, I synchronized the entries, making the script happy.
> >
> > We might think on integrating the script with checkpatch.pl, but, as
> > we should get rid of 00-INDEX, it probably not worth the efforts.
>
> I would agree with that; I don't see the point of keeping those files
> around in the longer term.
>
> I've applied the set.  I do have a few quibbles with the final patch that
> I'll send separately, but they're not something to hold this set up for.

Jon,

Did a patch fixing the quibbles.

As it seems you didn't push yet the changeset upstream, feel free to
just fold it with patch 5/5 if you prefer so, or to add as a separate
patch at the end of the series.

Patch enclosed.

Thanks,
Mauro

[PATCH] docs: 00-INDEX: change text related to the building system

Let be clearer on those files related to the build system.

Signed-off-by: Mauro Carvalho Chehab <mchehab@s-opensource.com>
Signed-off-by: Jonathan Corbet <corbet@lwn.net>
2016-12-06 06:13:03 -07:00
Chris Wilson
1fe7841d89 drm: Don't block the kworker waiting for mode_config.mutex in output_poll()
If we cannot acquire the mode_config.mutex immediately, just back off and
queue a new attempt after the poll interval. This is mostly to stop the
hung task spam when the system is deadlocked, but it will also lessen
the load (in such extreme cases).

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Eric Engestrom <eric.engestrom@imgtec.com>
[danvet:s/lock/mutex/ per Eric's comment.]
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Link: http://patchwork.freedesktop.org/patch/msgid/20161206113715.30382-1-chris@chris-wilson.co.uk
2016-12-06 13:41:15 +01:00
Michel Dänzer
d5264ed382 drm: Return -ENOTSUPP when called for KMS cap with a non-KMS driver
This is an attempt to make the previous fix a bit more robust going
forward.

v2:
* Only allow DRM_CAP_TIMESTAMP_MONOTONIC with UMS drivers (Daniel
  Vetter, Alex Deucher)
* Different logic to keep DRM_CAP_TIMESTAMP_MONOTONIC separate from
  the other caps (Daniel Vetter)

Signed-off-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Link: http://patchwork.freedesktop.org/patch/msgid/20161201073731.5716-1-michel@daenzer.net
2016-12-06 13:27:35 +01:00