Commit Graph

22 Commits

Author SHA1 Message Date
Ralf Baechle
aea0e582d3 [MIPS] Viper2: Remove defective support.
A defconfig file and the 10 lines of code (including comments ...) that
are rotting since lmo commit 6516a42dc8b40c6c00010346dd51496125b16644
don't quite make proper support, so let's trash it.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-03-13 16:59:31 +00:00
Franck Bui-Huu
9693a85378 [MIPS] Add basic SMARTMIPS ASE support
This patch adds trivial support for SMARTMIPS extension. This extension
is currently implemented by 4KS[CD] CPUs.

Basically it saves/restores ACX register, which is part of the SMARTMIPS
ASE, when needed. This patch does *not* add any support for Smartmips MMU
features.

Futhermore this patch does not add explicit support for 4KS[CD] CPUs since
they are respectively mips32 and mips32r2 compliant.  So with the current
processor configuration, a platform that has such CPUs needs to select
both configs:

	CPU_HAS_SMARTMIPS
	SYS_HAS_CPU_MIPS32_R[12]

This is due to the processor configuration which is mixing up all the
architecture variants and the processor types.

The drawback of this, is that we currently pass '-march=mips32' option to
gcc when building a kernel instead of '-march=4ksc' for 4KSC case. This
can lead to a kernel image a little bit bigger than required.

Signed-off-by: Franck Bui-Huu <fbuihuu@gmail.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-02-22 00:50:44 +00:00
Ralf Baechle
040cf8cfe5 [MIPS] Update defconfigs
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-02-18 21:31:37 +00:00
Ralf Baechle
b228f4c54d [MIPS] Malta: Resurrect MTD support for onboard flash.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-12-12 01:46:24 +00:00
Thomas Bogendoerfer
14b36af46a [MIPS] Rename SNI_RM200_PCI to just SNI_RM preparing for more RM machines
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-12-09 01:03:58 +00:00
Ralf Baechle
59d6ab86a6 [MIPS] Update Malta config.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-10-08 02:38:27 +01:00
Atsushi Nemoto
1a6183f2e6 [MIPS] lockdep: update defconfigs
Add those lines to all defconfigs.

CONFIG_LOCKDEP_SUPPORT=y
CONFIG_STACKTRACE_SUPPORT=y
CONFIG_TRACE_IRQFLAGS_SUPPORT=y

This is a patch againt linux-mips.org git tree.

Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-10-01 23:16:57 +01:00
Ralf Baechle
f83b854a1d [MIPS] Enable tmpfs for anything that possibly runs a full distribution.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-09-27 13:37:57 +01:00
Ralf Baechle
d48f1de2d8 [MIPS] Remove EV96100 as previously announced.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-09-27 13:37:55 +01:00
Ralf Baechle
98ab66cdd1 [MIPS] Update defconfigs to 2.6.18-rc1. 2006-07-13 21:25:57 +01:00
Atsushi Nemoto
1723b4a34a [MIPS] Make timer interrupt frequency configurable from kconfig.
Make HZ configurable.  DECSTATION can select 128/256/1024 HZ, JAZZ can
only select 100 HZ, others can select 100/128/250/256/1000/1024 HZ if
not explicitly specified).  Also remove all mach-xxx/param.h files and
update all defconfigs according to current HZ value.

Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-06-19 17:39:27 +01:00
Ralf Baechle
470b160364 [MIPS] Remove support for NEC DDB5476.
As warned several times before.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-06-19 17:39:24 +01:00
Ralf Baechle
eaff388874 [MIPS] Remove support for NEC DDB5074.
As warned several times before.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-06-19 17:39:24 +01:00
Ralf Baechle
b775565952 [MIPS] Update MIPS defconfigs.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-04-27 15:13:50 +01:00
Ralf Baechle
48e08101c0 [MIPS] Update defconfigs.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-03-21 13:27:48 +00:00
Ralf Baechle
adfc76419b MIPS: Malta: Change CPU default to R2.
... giving those with with R1 or older CPU cards more rope to
missconfigure their kernels.  But MIPS is only selling R2 CPUs since
two or three years already.
    
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-01-10 13:39:08 +00:00
Ralf Baechle
80b42598ee [MIPS] Update defconfigs to reflect Kconfig changes.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2005-12-01 11:05:19 +00:00
Ralf Baechle
aec8b7557c [MIPS] Update defconfigs
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2005-11-17 16:23:58 +00:00
Ralf Baechle
09af7b443c Update MIPS defconfig files.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2005-10-29 19:32:54 +01:00
Ralf Baechle
4ce588cd56 [PATCH] mips: fix coherency configuration
Fix the MIPS coherency configuration such that we always keep the mapping
state in <asm/pci.h> when we need to on non-coherent platforms.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2005-09-05 00:06:07 -07:00
Ralf Baechle
875d43e72b [PATCH] mips: clean up 32/64-bit configuration
Start cleaning 32-bit vs. 64-bit configuration.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2005-09-05 00:06:06 -07:00
Linus Torvalds
1da177e4c3 Linux-2.6.12-rc2
Initial git repository build. I'm not bothering with the full history,
even though we have it. We can create a separate "historical" git
archive of that later if we want to, and in the meantime it's about
3.2GB when imported into git - space that would just make the early
git days unnecessarily complicated, when we don't have a lot of good
infrastructure for it.

Let it rip!
2005-04-16 15:20:36 -07:00