The SH7780 PCI controller supports 3 different ranges of PCI memory in
addition to its PCI I/O window. In the case of 29-bit mode, only 2 memory
windows are supported, while in 32-bit mode all 3 are visible. This
attempts to make the resource handling completely dynamic and to permit
platforms to map in as many apertures as they can handle.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
These were never handled before, so implement some common infrastructure
to support them, then make use of that in the SH7780-specific code. In
practice there is little here that can not be generalized for SH4 parts,
which will be an incremental change as the 7780/7751 code is gradually
unified.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
register_pci_controller() can fail, but presently is a void function.
Change this over to an int so that we can bail early before continuing on
with post-registration initialization (such as throwing the controller in
to 66MHz mode in the case of the SH7780 host controller).
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
This adds some helper glue for scanning the bus and determining if all
of the devices are 66MHz capable or not before flipping on 66MHz mode.
This isn't quite to spec, but it's fairly consistent with what other
embedded controllers end up having to do.
Scanning code cribbed from the MIPS txx9 PCI code.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
For systems that have more than 512MB we need to set up an additional
mapping, this fixes up the rounding to the next power of two and splits
out the mapping accordingly between the two local bus mapping windows.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
The host controllers only support type 1, so there's not much else to
test for. Some of the older controllers also supported type 2 accesses,
but we've never supported those, and likely never will. Beyond that, the
P1SEG test is meaningless for 32-bit mode, so rather than refactoring it,
just kill the type 1 test off completely.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Newer SH parts are now commonly shipping with multiple controllers, so
we wire up PCI domain support to deal with them. Shamelessly cloned from
the MIPS implementation.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Presently we just call in to request_resource() for the ioport and iomem
resources without checking for errors. This has already hidden a couple
of bugs, so add some error handling in for good measure.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
This consolidates the PCI initialization code for all of the pci-sh7780
users, and sets up the memory window dynamically as opposed to using
hardcoded window positions.
A number of bugs were fixed at the same time, including the PIO handling
and master abort timeout settings being incorrect.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
The old ctrl in/out routines are non-portable and unsuitable for
cross-platform use. While drivers/sh has already been sanitized, there
is still quite a lot of code that is not. This converts the arch/sh/ bits
over, which permits us to flag the routines as deprecated whilst still
building with -Werror for the architecture code, and to ensure that
future users are not added.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Previously this was only built in for Urquell boards, but the same
approach can be used on SDK7786 now that the mode pin reading is
supported, so make it generic to SH7786.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Signed-off-by: Sam Ravnborg <sam@ravnborg.org>
Cc: Paul Mundt <lethal@linux-sh.org>
Cc: Al Viro <viro@zeniv.linux.org.uk>
Signed-off-by: Michal Marek <mmarek@suse.cz>
Now that this contains a grand total of 1 Kconfig option, it's hardly
worth keeping split out. Roll CONFIG_PCI back in to the top-level
architecture Kconfig, along with the other bus types.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Leaving this configurable caused more trouble than it was ever worth, so
just make it explicit. Boards that are verified one way or the other can
fix up their selects accordingly. We presently default to non-coherent
for most platforms.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
The synopsys PCI cell used in the later STMicro chips requires code to
be run in order to do IO cycles, rather than just memory mapping the IO
space. Rather than extending the existing SH infrastructure to allow
this, use the GENERIC_IOMAP implmentation to save re-inventing the
wheel.
This set of changes allows the SH to be built with GENERIC_IOMAP
enabled, it just ifdef's out the functions provided by the GENERIC_IOMAP
implementation, and provides a few required missing functions.
Signed-off-by: David McKay <david.mckay@st.com>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
This adds initial support for the PCI-Express module in the SH7786,
particularly as it relates to the urquell platform. Presently it is
only supported in root complex mode, with endpoint mode still requiring
more debugging. 29/32-bit mode and lane configurations are selectable via
board mode pins, and are otherwise fixed.
Only 4x and 1x PCI channels are presently handled, the PCI bridge still
requires additional debugging and stabilization in hardware.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
This adds in preliminary support for the SH7786 PCIe module PCI ops,
and the corresponding module definitions.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Some host controllers (such as SH7786) have overlapping regions that are
fixed in hardware. The resource allocator does the right thing in
managing this space already, so the conflict case is non-fatal.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
This fixes a build error where references to pci_cache_line_size are
undefined, as this ceases to be exported when PCI_DISABLE_MWI is enabled,
as is now the default.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
As there is only a single controller and remapping has no impact for the
address range in question, just initialize it directly in the controller
definition. This fixes up boot time warnings about not having the field
initialized.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Presently this is special-cased for early initialization. While there are
situations where these static early initializations are still necessary,
with minor changes it is possible to use this for the regular ioremap
implementation as well. This allows us to kill off the special-casing for
the remap completely and to start tidying up all of the SH-5
special-casing in drivers.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Now that the pci-auto cruft is gone, pci-lib can go away.
Roll it back in to pci-new.c where it originally split off from.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
The se7751 was still doing the PCI fixups in its own board directory,
so we move it over to arch/sh/drivers/pci/ with the rest of the board
fixups. It has bitrotted significantly over the years, so will still
likely need a bit of work to bring back up to date.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
This follows the similar sort of scheme that the refactored SH7780 code
uses, using a 64MB CS3 mapping to handle the window0 case, and simply
discarding window1. This vastly simplifies the code, and allows most of
the board-specific setup to go die.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
These fixups seem to have bitrotted a bit since their introduction in the
2.4 days. As we never had much use for them in the first place, and
nothing is using them any more, kill them off the rest of the way.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
This isn't a real BAR, so prevent any attempts to move it, as we don't
wish to encourage a bus luck by overzealous PCI initialization code.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
This moves the remaining common bits in to pci-lib. Thereby reducing
pci.c/pci-new.c to simple bus fixups and controller registration.
As more platforms are moved over, the old code will disappear completely
and the pci-new bits will be rolled in to pci-lib, eventually replacing
pci.c completely.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Now that the io and mem offsets are tracked accordingly, the pci-new
version of the bus<->resource mappers can be used generically. This
moves them in to pci-lib.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
This moves off of the board_pci_channels[] approach for bus registration
and over to a cleaner register_pci_controller(), all derived from the
MIPS code.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
This consolidates the pci_iomap() definitions and reworks how the I/O
port base is handled. PCI channels can register their own I/O map base,
or if none is provided, the system-wide generic I/O base is used instead.
Functionally nothing changes, while this allows us to kill off lots of
I/O address special casing and lookups.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
This is left over cruft that hasn't been used by anything in a long time,
kill off bits that weren't purged previously.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
This introduces a saner pcibios_align_resource() that can be used
regardless of whether pci-auto or pci-new are being used, and
consolidates it in pci-lib.c.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
This splits off a 'pci-new.c' which is aimed at gradually replacing the
pci-auto backend and the arch/sh/drivers/pci/pci.c core respectively.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
The new PCI code wants its own bus<->resource mappings instead of the
generic equivalents, so drop the asm-generic include in preparation.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
This starts moving out the common initialization bits from the various
fixup paths in to the shared init path.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
