This area is horrifically complicated on these chipsets, and it's likely we
will need at least a few more tweaks yet.
Oh yes, and it's completely disabled on IGPs for the moment. From traces,
things look potentially different there yet again. Sigh...
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Following to "drm/nv50/pm: s/unk05/vdec/", let's rename the PLL to PLL_VDEC
PLL names are purely indicative and are based on the most important engine
it clocks.
Signed-off-by: Martin Peres <martin.peres@labri.fr>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Reporting an error is better than silently refusing to reclock.
V2: Use the same logic on nv40
Signed-off-by: Martin Peres <martin.peres@labri.fr>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Fixes a case where we don't get separate supervisor interrupt sequences for
disconnect and modeset events.
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Should fix issues with kexec, and as a nice side bonus, the code to avoid
having PDISP disappear will also fix hibernate on those effected systems.
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
This has the effect of ensuring the encoders which were active before we
loaded get disconnected properly before we start reprogramming them.
Also removing a bit of cargo-cult from the initial evo pushbuf.
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
PDISP doesn't like it when disabled CRTCs are poked.
Fixes external output not coming to life when it has cursor on.
https://bugs.freedesktop.org/show_bug.cgi?id=41608
Signed-off-by: Maxim Levitsky <maximlevitsky@gmail.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Otherwice code that responsible for idling the card can't work.
BIOS init tables are supposed to init the clocks to correct values,
so that shouldn't cause any problems (we don't reclock by default anyway)
Signed-off-by: Maxim Levitsky <maximlevitsky@gmail.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Because doing polling while hardware is disabled is a bad idea...
Signed-off-by: Maxim Levitsky <maximlevitsky@gmail.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Exposes the same connector properties as the Radeon implementation, however
their behaviour isn't exactly the same. The primary difference being that
unless both hborder/vborder have been defined by the user, the driver will
keep the aspect ratio of the overscanned area the same as the mode the
display is programmed for.
Enabled for digital outputs on GeForce 8 and up, excluding GF119.
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
A NV49 appeared a while back that was using the "nv41 style" pwm registers,
rather than the "nv40 style" ones my board is using. This disproves the
previous theory that the pwm controller choice is chipset-specific.
So, after looking at a bunch of vbios images it appears that the next viable
theory is that we should select the pwm controller to use based on the gpio
line the fan is tied to, just like we do on nv50.
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
The handling of the internal pwm fan controller is similar enough between
current chipsets that it makes sense to share the logic, and bugfixes :)
No hw backends converted yet, will automatically fall-through to the
"old" per-chipset fanspeed hooks for now.
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Exposes the following sysfs entries:
- fan0_input: read the rotational speed of the fan (poll a bit during 250ms)
- pwm0: set the pwm duty cycle
- pwm0_min/max: set the minimum/maximum pwm value
v2 (Ben Skeggs):
- nv50 pwm controller code removed in favour of other more complete code
- FAN_RPM -> FAN_SENSE
- merged FAN_SENSE readout into common code, not at all nv50-specific
- protected fanspeed changes with perflvl_wr
- formatting tidying
- added some comments where things are shaky
v3 (Martin Peres)
- ensure duty min/max from thermal table are sane
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Signed-off-by: Martin Peres <martin.peres@ensi-bourges.fr>
This function returns the number of planes used by a specific pixel
format.
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Rob Clark <rob.clark@linaro.org>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Call connector->funcs->dpms(DPMS_ON) rather than just setting
connector->dpms = DPMS_ON. This ensures that if the connector
has something to do to enable the output (rather than just using
drm_helper_connector_dpms helper directly), that this happens
at bootup. This solves an issue with connectors not getting
enabled from fbcon_init() when the driver is loaded.
Signed-off-by: Rob Clark <rob@ti.com>
Reviewed-by: Adam Jackson <ajax@redhat.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
If the bpc is set from the connector is 0, we then use it later to adjust
in a special case the HDMI pixel clock, however if the bpc is 0, we end up
passing a 0 pixel clock into the code.
I'm not sure if this is the correct answer or if we should avoid the HDMI
clock adjustment for 0 values.
This fixes a divide by 0 on my Llano system with a HDMI monitor and hdmi
audio enabled.
Reviewed-by: Alex Deucher <alexdeucher@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Somewhat specializaed sub-allocator designed to perform sub-allocation
for command buffer not only for current cs ioctl but for future command
submission ioctl as well. Patch also convert current ib pool to use
the sub allocator. Idea is that ib poll buffer can be share with other
command buffer submission not having 64K granularity.
v2 Harmonize pool handling and add suspend/resume callback to pin/unpin
sa bo (tested on rv280, rv370, r420, rv515, rv610, rv710, redwood, cayman,
rs480, rs690, rs880)
v3 Simplify allocator
v4 Fix radeon_ib_get error path to properly free fence
Signed-off-by: Jerome Glisse <jglisse@redhat.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Christian König <deathsimple@vodafone.de>
Signed-off-by: Dave Airlie <airlied@redhat.com>
cayman is wb only and doesn't have a VC.
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Christian König <deathsimple@vodafone.de>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Some rptr/wptrs fields have different offsets and not all rings are pm4
so add a new nop field.
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Christian König <deathsimple@vodafone.de>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Also test multiple waits on the same semaphore.
Signed-off-by: Christian König <deathsimple@vodafone.de>
Reviewed-by: Jerome Glisse <jglisse@redhat.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Add a start fence driver helper function which will be call
once for each ring and will compute cpu/gpu addr for fence
depending on wether to use wb buffer or scratch reg.
This patch replace initialize fence driver separately which
was broken in regard of GPU lockup. The fence list for created,
emited, signaled must be initialize once and only from the
asic init callback not from the startup call back which is
call from the gpu reset.
v2: With this in place we no longer need to know the number of
rings in fence_driver_init, also writing to the scratch reg
before knowing its offset is a bad idea.
v3: rebase on top of change to previous patch in the serie
Signed-off-by: Christian König <deathsimple@vodafone.de>
Signed-off-by: Jerome Glisse <jglisse@redhat.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
