forked from luck/tmp_suning_uos_patched
b24413180f
Many source files in the tree are missing licensing information, which makes it harder for compliance tools to determine the correct license. By default all files without license information are under the default license of the kernel, which is GPL version 2. Update the files which contain no license information with the 'GPL-2.0' SPDX license identifier. The SPDX identifier is a legally binding shorthand, which can be used instead of the full boiler plate text. This patch is based on work done by Thomas Gleixner and Kate Stewart and Philippe Ombredanne. How this work was done: Patches were generated and checked against linux-4.14-rc6 for a subset of the use cases: - file had no licensing information it it. - file was a */uapi/* one with no licensing information in it, - file was a */uapi/* one with existing licensing information, Further patches will be generated in subsequent months to fix up cases where non-standard license headers were used, and references to license had to be inferred by heuristics based on keywords. The analysis to determine which SPDX License Identifier to be applied to a file was done in a spreadsheet of side by side results from of the output of two independent scanners (ScanCode & Windriver) producing SPDX tag:value files created by Philippe Ombredanne. Philippe prepared the base worksheet, and did an initial spot review of a few 1000 files. The 4.13 kernel was the starting point of the analysis with 60,537 files assessed. Kate Stewart did a file by file comparison of the scanner results in the spreadsheet to determine which SPDX license identifier(s) to be applied to the file. She confirmed any determination that was not immediately clear with lawyers working with the Linux Foundation. Criteria used to select files for SPDX license identifier tagging was: - Files considered eligible had to be source code files. - Make and config files were included as candidates if they contained >5 lines of source - File already had some variant of a license header in it (even if <5 lines). All documentation files were explicitly excluded. The following heuristics were used to determine which SPDX license identifiers to apply. - when both scanners couldn't find any license traces, file was considered to have no license information in it, and the top level COPYING file license applied. For non */uapi/* files that summary was: SPDX license identifier # files ---------------------------------------------------|------- GPL-2.0 11139 and resulted in the first patch in this series. If that file was a */uapi/* path one, it was "GPL-2.0 WITH Linux-syscall-note" otherwise it was "GPL-2.0". Results of that was: SPDX license identifier # files ---------------------------------------------------|------- GPL-2.0 WITH Linux-syscall-note 930 and resulted in the second patch in this series. - if a file had some form of licensing information in it, and was one of the */uapi/* ones, it was denoted with the Linux-syscall-note if any GPL family license was found in the file or had no licensing in it (per prior point). Results summary: SPDX license identifier # files ---------------------------------------------------|------ GPL-2.0 WITH Linux-syscall-note 270 GPL-2.0+ WITH Linux-syscall-note 169 ((GPL-2.0 WITH Linux-syscall-note) OR BSD-2-Clause) 21 ((GPL-2.0 WITH Linux-syscall-note) OR BSD-3-Clause) 17 LGPL-2.1+ WITH Linux-syscall-note 15 GPL-1.0+ WITH Linux-syscall-note 14 ((GPL-2.0+ WITH Linux-syscall-note) OR BSD-3-Clause) 5 LGPL-2.0+ WITH Linux-syscall-note 4 LGPL-2.1 WITH Linux-syscall-note 3 ((GPL-2.0 WITH Linux-syscall-note) OR MIT) 3 ((GPL-2.0 WITH Linux-syscall-note) AND MIT) 1 and that resulted in the third patch in this series. - when the two scanners agreed on the detected license(s), that became the concluded license(s). - when there was disagreement between the two scanners (one detected a license but the other didn't, or they both detected different licenses) a manual inspection of the file occurred. - In most cases a manual inspection of the information in the file resulted in a clear resolution of the license that should apply (and which scanner probably needed to revisit its heuristics). - When it was not immediately clear, the license identifier was confirmed with lawyers working with the Linux Foundation. - If there was any question as to the appropriate license identifier, the file was flagged for further research and to be revisited later in time. In total, over 70 hours of logged manual review was done on the spreadsheet to determine the SPDX license identifiers to apply to the source files by Kate, Philippe, Thomas and, in some cases, confirmation by lawyers working with the Linux Foundation. Kate also obtained a third independent scan of the 4.13 code base from FOSSology, and compared selected files where the other two scanners disagreed against that SPDX file, to see if there was new insights. The Windriver scanner is based on an older version of FOSSology in part, so they are related. Thomas did random spot checks in about 500 files from the spreadsheets for the uapi headers and agreed with SPDX license identifier in the files he inspected. For the non-uapi files Thomas did random spot checks in about 15000 files. In initial set of patches against 4.14-rc6, 3 files were found to have copy/paste license identifier errors, and have been fixed to reflect the correct identifier. Additionally Philippe spent 10 hours this week doing a detailed manual inspection and review of the 12,461 patched files from the initial patch version early this week with: - a full scancode scan run, collecting the matched texts, detected license ids and scores - reviewing anything where there was a license detected (about 500+ files) to ensure that the applied SPDX license was correct - reviewing anything where there was no detection but the patch license was not GPL-2.0 WITH Linux-syscall-note to ensure that the applied SPDX license was correct This produced a worksheet with 20 files needing minor correction. This worksheet was then exported into 3 different .csv files for the different types of files to be modified. These .csv files were then reviewed by Greg. Thomas wrote a script to parse the csv files and add the proper SPDX tag to the file, in the format that the file expected. This script was further refined by Greg based on the output to detect more types of files automatically and to distinguish between header and source .c files (which need different comment types.) Finally Greg ran the script using the .csv files to generate the patches. Reviewed-by: Kate Stewart <kstewart@linuxfoundation.org> Reviewed-by: Philippe Ombredanne <pombredanne@nexb.com> Reviewed-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
222 lines
7.7 KiB
C
222 lines
7.7 KiB
C
/* SPDX-License-Identifier: GPL-2.0 */
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/****************************************************************************/
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/*
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* m523xsim.h -- ColdFire 523x System Integration Module support.
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*
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* (C) Copyright 2003-2005, Greg Ungerer <gerg@snapgear.com>
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*/
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/****************************************************************************/
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#ifndef m523xsim_h
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#define m523xsim_h
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/****************************************************************************/
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#define CPU_NAME "COLDFIRE(m523x)"
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#define CPU_INSTR_PER_JIFFY 3
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#define MCF_BUSCLK (MCF_CLK / 2)
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#include <asm/m52xxacr.h>
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/*
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* Define the 523x SIM register set addresses.
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*/
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#define MCFICM_INTC0 (MCF_IPSBAR + 0x0c00) /* Base for Interrupt Ctrl 0 */
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#define MCFICM_INTC1 (MCF_IPSBAR + 0x0d00) /* Base for Interrupt Ctrl 0 */
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#define MCFINTC_IPRH 0x00 /* Interrupt pending 32-63 */
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#define MCFINTC_IPRL 0x04 /* Interrupt pending 1-31 */
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#define MCFINTC_IMRH 0x08 /* Interrupt mask 32-63 */
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#define MCFINTC_IMRL 0x0c /* Interrupt mask 1-31 */
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#define MCFINTC_INTFRCH 0x10 /* Interrupt force 32-63 */
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#define MCFINTC_INTFRCL 0x14 /* Interrupt force 1-31 */
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#define MCFINTC_IRLR 0x18 /* */
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#define MCFINTC_IACKL 0x19 /* */
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#define MCFINTC_ICR0 0x40 /* Base ICR register */
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#define MCFINT_VECBASE 64 /* Vector base number */
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#define MCFINT_UART0 13 /* Interrupt number for UART0 */
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#define MCFINT_UART1 14 /* Interrupt number for UART1 */
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#define MCFINT_UART2 15 /* Interrupt number for UART2 */
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#define MCFINT_I2C0 17 /* Interrupt number for I2C */
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#define MCFINT_QSPI 18 /* Interrupt number for QSPI */
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#define MCFINT_FECRX0 23 /* Interrupt number for FEC */
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#define MCFINT_FECTX0 27 /* Interrupt number for FEC */
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#define MCFINT_FECENTC0 29 /* Interrupt number for FEC */
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#define MCFINT_PIT1 36 /* Interrupt number for PIT1 */
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#define MCF_IRQ_UART0 (MCFINT_VECBASE + MCFINT_UART0)
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#define MCF_IRQ_UART1 (MCFINT_VECBASE + MCFINT_UART1)
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#define MCF_IRQ_UART2 (MCFINT_VECBASE + MCFINT_UART2)
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#define MCF_IRQ_FECRX0 (MCFINT_VECBASE + MCFINT_FECRX0)
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#define MCF_IRQ_FECTX0 (MCFINT_VECBASE + MCFINT_FECTX0)
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#define MCF_IRQ_FECENTC0 (MCFINT_VECBASE + MCFINT_FECENTC0)
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#define MCF_IRQ_QSPI (MCFINT_VECBASE + MCFINT_QSPI)
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#define MCF_IRQ_PIT1 (MCFINT_VECBASE + MCFINT_PIT1)
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#define MCF_IRQ_I2C0 (MCFINT_VECBASE + MCFINT_I2C0)
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/*
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* SDRAM configuration registers.
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*/
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#define MCFSIM_DCR (MCF_IPSBAR + 0x44) /* Control */
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#define MCFSIM_DACR0 (MCF_IPSBAR + 0x48) /* Base address 0 */
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#define MCFSIM_DMR0 (MCF_IPSBAR + 0x4c) /* Address mask 0 */
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#define MCFSIM_DACR1 (MCF_IPSBAR + 0x50) /* Base address 1 */
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#define MCFSIM_DMR1 (MCF_IPSBAR + 0x54) /* Address mask 1 */
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/*
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* Reset Control Unit (relative to IPSBAR).
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*/
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#define MCF_RCR (MCF_IPSBAR + 0x110000)
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#define MCF_RSR (MCF_IPSBAR + 0x110001)
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#define MCF_RCR_SWRESET 0x80 /* Software reset bit */
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#define MCF_RCR_FRCSTOUT 0x40 /* Force external reset */
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/*
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* UART module.
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*/
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#define MCFUART_BASE0 (MCF_IPSBAR + 0x200)
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#define MCFUART_BASE1 (MCF_IPSBAR + 0x240)
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#define MCFUART_BASE2 (MCF_IPSBAR + 0x280)
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/*
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* FEC ethernet module.
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*/
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#define MCFFEC_BASE0 (MCF_IPSBAR + 0x1000)
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#define MCFFEC_SIZE0 0x800
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/*
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* QSPI module.
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*/
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#define MCFQSPI_BASE (MCF_IPSBAR + 0x340)
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#define MCFQSPI_SIZE 0x40
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#define MCFQSPI_CS0 91
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#define MCFQSPI_CS1 92
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#define MCFQSPI_CS2 103
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#define MCFQSPI_CS3 99
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/*
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* GPIO module.
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*/
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#define MCFGPIO_PODR_ADDR (MCF_IPSBAR + 0x100000)
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#define MCFGPIO_PODR_DATAH (MCF_IPSBAR + 0x100001)
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#define MCFGPIO_PODR_DATAL (MCF_IPSBAR + 0x100002)
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#define MCFGPIO_PODR_BUSCTL (MCF_IPSBAR + 0x100003)
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#define MCFGPIO_PODR_BS (MCF_IPSBAR + 0x100004)
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#define MCFGPIO_PODR_CS (MCF_IPSBAR + 0x100005)
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#define MCFGPIO_PODR_SDRAM (MCF_IPSBAR + 0x100006)
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#define MCFGPIO_PODR_FECI2C (MCF_IPSBAR + 0x100007)
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#define MCFGPIO_PODR_UARTH (MCF_IPSBAR + 0x100008)
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#define MCFGPIO_PODR_UARTL (MCF_IPSBAR + 0x100009)
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#define MCFGPIO_PODR_QSPI (MCF_IPSBAR + 0x10000A)
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#define MCFGPIO_PODR_TIMER (MCF_IPSBAR + 0x10000B)
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#define MCFGPIO_PODR_ETPU (MCF_IPSBAR + 0x10000C)
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#define MCFGPIO_PDDR_ADDR (MCF_IPSBAR + 0x100010)
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#define MCFGPIO_PDDR_DATAH (MCF_IPSBAR + 0x100011)
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#define MCFGPIO_PDDR_DATAL (MCF_IPSBAR + 0x100012)
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#define MCFGPIO_PDDR_BUSCTL (MCF_IPSBAR + 0x100013)
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#define MCFGPIO_PDDR_BS (MCF_IPSBAR + 0x100014)
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#define MCFGPIO_PDDR_CS (MCF_IPSBAR + 0x100015)
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#define MCFGPIO_PDDR_SDRAM (MCF_IPSBAR + 0x100016)
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#define MCFGPIO_PDDR_FECI2C (MCF_IPSBAR + 0x100017)
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#define MCFGPIO_PDDR_UARTH (MCF_IPSBAR + 0x100018)
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#define MCFGPIO_PDDR_UARTL (MCF_IPSBAR + 0x100019)
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#define MCFGPIO_PDDR_QSPI (MCF_IPSBAR + 0x10001A)
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#define MCFGPIO_PDDR_TIMER (MCF_IPSBAR + 0x10001B)
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#define MCFGPIO_PDDR_ETPU (MCF_IPSBAR + 0x10001C)
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#define MCFGPIO_PPDSDR_ADDR (MCF_IPSBAR + 0x100020)
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#define MCFGPIO_PPDSDR_DATAH (MCF_IPSBAR + 0x100021)
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#define MCFGPIO_PPDSDR_DATAL (MCF_IPSBAR + 0x100022)
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#define MCFGPIO_PPDSDR_BUSCTL (MCF_IPSBAR + 0x100023)
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#define MCFGPIO_PPDSDR_BS (MCF_IPSBAR + 0x100024)
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#define MCFGPIO_PPDSDR_CS (MCF_IPSBAR + 0x100025)
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#define MCFGPIO_PPDSDR_SDRAM (MCF_IPSBAR + 0x100026)
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#define MCFGPIO_PPDSDR_FECI2C (MCF_IPSBAR + 0x100027)
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#define MCFGPIO_PPDSDR_UARTH (MCF_IPSBAR + 0x100028)
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#define MCFGPIO_PPDSDR_UARTL (MCF_IPSBAR + 0x100029)
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#define MCFGPIO_PPDSDR_QSPI (MCF_IPSBAR + 0x10002A)
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#define MCFGPIO_PPDSDR_TIMER (MCF_IPSBAR + 0x10002B)
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#define MCFGPIO_PPDSDR_ETPU (MCF_IPSBAR + 0x10002C)
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#define MCFGPIO_PCLRR_ADDR (MCF_IPSBAR + 0x100030)
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#define MCFGPIO_PCLRR_DATAH (MCF_IPSBAR + 0x100031)
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#define MCFGPIO_PCLRR_DATAL (MCF_IPSBAR + 0x100032)
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#define MCFGPIO_PCLRR_BUSCTL (MCF_IPSBAR + 0x100033)
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#define MCFGPIO_PCLRR_BS (MCF_IPSBAR + 0x100034)
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#define MCFGPIO_PCLRR_CS (MCF_IPSBAR + 0x100035)
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#define MCFGPIO_PCLRR_SDRAM (MCF_IPSBAR + 0x100036)
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#define MCFGPIO_PCLRR_FECI2C (MCF_IPSBAR + 0x100037)
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#define MCFGPIO_PCLRR_UARTH (MCF_IPSBAR + 0x100038)
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#define MCFGPIO_PCLRR_UARTL (MCF_IPSBAR + 0x100039)
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#define MCFGPIO_PCLRR_QSPI (MCF_IPSBAR + 0x10003A)
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#define MCFGPIO_PCLRR_TIMER (MCF_IPSBAR + 0x10003B)
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#define MCFGPIO_PCLRR_ETPU (MCF_IPSBAR + 0x10003C)
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/*
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* PIT timer base addresses.
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*/
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#define MCFPIT_BASE1 (MCF_IPSBAR + 0x150000)
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#define MCFPIT_BASE2 (MCF_IPSBAR + 0x160000)
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#define MCFPIT_BASE3 (MCF_IPSBAR + 0x170000)
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#define MCFPIT_BASE4 (MCF_IPSBAR + 0x180000)
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/*
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* EPort
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*/
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#define MCFEPORT_EPPAR (MCF_IPSBAR + 0x130000)
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#define MCFEPORT_EPDDR (MCF_IPSBAR + 0x130002)
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#define MCFEPORT_EPIER (MCF_IPSBAR + 0x130003)
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#define MCFEPORT_EPDR (MCF_IPSBAR + 0x130004)
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#define MCFEPORT_EPPDR (MCF_IPSBAR + 0x130005)
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#define MCFEPORT_EPFR (MCF_IPSBAR + 0x130006)
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/*
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* Generic GPIO support
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*/
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#define MCFGPIO_PODR MCFGPIO_PODR_ADDR
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#define MCFGPIO_PDDR MCFGPIO_PDDR_ADDR
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#define MCFGPIO_PPDR MCFGPIO_PPDSDR_ADDR
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#define MCFGPIO_SETR MCFGPIO_PPDSDR_ADDR
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#define MCFGPIO_CLRR MCFGPIO_PCLRR_ADDR
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#define MCFGPIO_PIN_MAX 107
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#define MCFGPIO_IRQ_MAX 8
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#define MCFGPIO_IRQ_VECBASE MCFINT_VECBASE
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/*
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* Pin Assignment
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*/
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#define MCFGPIO_PAR_AD (MCF_IPSBAR + 0x100040)
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#define MCFGPIO_PAR_BUSCTL (MCF_IPSBAR + 0x100042)
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#define MCFGPIO_PAR_BS (MCF_IPSBAR + 0x100044)
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#define MCFGPIO_PAR_CS (MCF_IPSBAR + 0x100045)
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#define MCFGPIO_PAR_SDRAM (MCF_IPSBAR + 0x100046)
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#define MCFGPIO_PAR_FECI2C (MCF_IPSBAR + 0x100047)
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#define MCFGPIO_PAR_UART (MCF_IPSBAR + 0x100048)
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#define MCFGPIO_PAR_QSPI (MCF_IPSBAR + 0x10004A)
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#define MCFGPIO_PAR_TIMER (MCF_IPSBAR + 0x10004C)
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#define MCFGPIO_PAR_ETPU (MCF_IPSBAR + 0x10004E)
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/*
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* DMA unit base addresses.
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*/
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#define MCFDMA_BASE0 (MCF_IPSBAR + 0x100)
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#define MCFDMA_BASE1 (MCF_IPSBAR + 0x140)
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#define MCFDMA_BASE2 (MCF_IPSBAR + 0x180)
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#define MCFDMA_BASE3 (MCF_IPSBAR + 0x1C0)
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/*
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* I2C module.
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*/
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#define MCFI2C_BASE0 (MCF_IPSBAR + 0x300)
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#define MCFI2C_SIZE0 0x40
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/****************************************************************************/
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#endif /* m523xsim_h */
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