forked from luck/tmp_suning_uos_patched
b24413180f
Many source files in the tree are missing licensing information, which makes it harder for compliance tools to determine the correct license. By default all files without license information are under the default license of the kernel, which is GPL version 2. Update the files which contain no license information with the 'GPL-2.0' SPDX license identifier. The SPDX identifier is a legally binding shorthand, which can be used instead of the full boiler plate text. This patch is based on work done by Thomas Gleixner and Kate Stewart and Philippe Ombredanne. How this work was done: Patches were generated and checked against linux-4.14-rc6 for a subset of the use cases: - file had no licensing information it it. - file was a */uapi/* one with no licensing information in it, - file was a */uapi/* one with existing licensing information, Further patches will be generated in subsequent months to fix up cases where non-standard license headers were used, and references to license had to be inferred by heuristics based on keywords. The analysis to determine which SPDX License Identifier to be applied to a file was done in a spreadsheet of side by side results from of the output of two independent scanners (ScanCode & Windriver) producing SPDX tag:value files created by Philippe Ombredanne. Philippe prepared the base worksheet, and did an initial spot review of a few 1000 files. The 4.13 kernel was the starting point of the analysis with 60,537 files assessed. Kate Stewart did a file by file comparison of the scanner results in the spreadsheet to determine which SPDX license identifier(s) to be applied to the file. She confirmed any determination that was not immediately clear with lawyers working with the Linux Foundation. Criteria used to select files for SPDX license identifier tagging was: - Files considered eligible had to be source code files. - Make and config files were included as candidates if they contained >5 lines of source - File already had some variant of a license header in it (even if <5 lines). All documentation files were explicitly excluded. The following heuristics were used to determine which SPDX license identifiers to apply. - when both scanners couldn't find any license traces, file was considered to have no license information in it, and the top level COPYING file license applied. For non */uapi/* files that summary was: SPDX license identifier # files ---------------------------------------------------|------- GPL-2.0 11139 and resulted in the first patch in this series. If that file was a */uapi/* path one, it was "GPL-2.0 WITH Linux-syscall-note" otherwise it was "GPL-2.0". Results of that was: SPDX license identifier # files ---------------------------------------------------|------- GPL-2.0 WITH Linux-syscall-note 930 and resulted in the second patch in this series. - if a file had some form of licensing information in it, and was one of the */uapi/* ones, it was denoted with the Linux-syscall-note if any GPL family license was found in the file or had no licensing in it (per prior point). Results summary: SPDX license identifier # files ---------------------------------------------------|------ GPL-2.0 WITH Linux-syscall-note 270 GPL-2.0+ WITH Linux-syscall-note 169 ((GPL-2.0 WITH Linux-syscall-note) OR BSD-2-Clause) 21 ((GPL-2.0 WITH Linux-syscall-note) OR BSD-3-Clause) 17 LGPL-2.1+ WITH Linux-syscall-note 15 GPL-1.0+ WITH Linux-syscall-note 14 ((GPL-2.0+ WITH Linux-syscall-note) OR BSD-3-Clause) 5 LGPL-2.0+ WITH Linux-syscall-note 4 LGPL-2.1 WITH Linux-syscall-note 3 ((GPL-2.0 WITH Linux-syscall-note) OR MIT) 3 ((GPL-2.0 WITH Linux-syscall-note) AND MIT) 1 and that resulted in the third patch in this series. - when the two scanners agreed on the detected license(s), that became the concluded license(s). - when there was disagreement between the two scanners (one detected a license but the other didn't, or they both detected different licenses) a manual inspection of the file occurred. - In most cases a manual inspection of the information in the file resulted in a clear resolution of the license that should apply (and which scanner probably needed to revisit its heuristics). - When it was not immediately clear, the license identifier was confirmed with lawyers working with the Linux Foundation. - If there was any question as to the appropriate license identifier, the file was flagged for further research and to be revisited later in time. In total, over 70 hours of logged manual review was done on the spreadsheet to determine the SPDX license identifiers to apply to the source files by Kate, Philippe, Thomas and, in some cases, confirmation by lawyers working with the Linux Foundation. Kate also obtained a third independent scan of the 4.13 code base from FOSSology, and compared selected files where the other two scanners disagreed against that SPDX file, to see if there was new insights. The Windriver scanner is based on an older version of FOSSology in part, so they are related. Thomas did random spot checks in about 500 files from the spreadsheets for the uapi headers and agreed with SPDX license identifier in the files he inspected. For the non-uapi files Thomas did random spot checks in about 15000 files. In initial set of patches against 4.14-rc6, 3 files were found to have copy/paste license identifier errors, and have been fixed to reflect the correct identifier. Additionally Philippe spent 10 hours this week doing a detailed manual inspection and review of the 12,461 patched files from the initial patch version early this week with: - a full scancode scan run, collecting the matched texts, detected license ids and scores - reviewing anything where there was a license detected (about 500+ files) to ensure that the applied SPDX license was correct - reviewing anything where there was no detection but the patch license was not GPL-2.0 WITH Linux-syscall-note to ensure that the applied SPDX license was correct This produced a worksheet with 20 files needing minor correction. This worksheet was then exported into 3 different .csv files for the different types of files to be modified. These .csv files were then reviewed by Greg. Thomas wrote a script to parse the csv files and add the proper SPDX tag to the file, in the format that the file expected. This script was further refined by Greg based on the output to detect more types of files automatically and to distinguish between header and source .c files (which need different comment types.) Finally Greg ran the script using the .csv files to generate the patches. Reviewed-by: Kate Stewart <kstewart@linuxfoundation.org> Reviewed-by: Philippe Ombredanne <pombredanne@nexb.com> Reviewed-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
156 lines
6.1 KiB
C
156 lines
6.1 KiB
C
/* SPDX-License-Identifier: GPL-2.0 */
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/****************************************************************************/
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/*
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* m5407sim.h -- ColdFire 5407 System Integration Module support.
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*
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* (C) Copyright 2000, Lineo (www.lineo.com)
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* (C) Copyright 1999, Moreton Bay Ventures Pty Ltd.
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*
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* Modified by David W. Miller for the MCF5307 Eval Board.
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*/
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/****************************************************************************/
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#ifndef m5407sim_h
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#define m5407sim_h
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/****************************************************************************/
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#define CPU_NAME "COLDFIRE(m5407)"
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#define CPU_INSTR_PER_JIFFY 3
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#define MCF_BUSCLK (MCF_CLK / 2)
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#include <asm/m54xxacr.h>
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/*
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* Define the 5407 SIM register set addresses.
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*/
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#define MCFSIM_RSR (MCF_MBAR + 0x00) /* Reset Status */
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#define MCFSIM_SYPCR (MCF_MBAR + 0x01) /* System Protection */
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#define MCFSIM_SWIVR (MCF_MBAR + 0x02) /* SW Watchdog intr */
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#define MCFSIM_SWSR (MCF_MBAR + 0x03) /* SW Watchdog service*/
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#define MCFSIM_PAR (MCF_MBAR + 0x04) /* Pin Assignment */
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#define MCFSIM_IRQPAR (MCF_MBAR + 0x06) /* Intr Assignment */
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#define MCFSIM_PLLCR (MCF_MBAR + 0x08) /* PLL Ctrl */
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#define MCFSIM_MPARK (MCF_MBAR + 0x0C) /* BUS Master Ctrl */
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#define MCFSIM_IPR (MCF_MBAR + 0x40) /* Interrupt Pending */
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#define MCFSIM_IMR (MCF_MBAR + 0x44) /* Interrupt Mask */
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#define MCFSIM_AVR (MCF_MBAR + 0x4b) /* Autovector Ctrl */
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#define MCFSIM_ICR0 (MCF_MBAR + 0x4c) /* Intr Ctrl reg 0 */
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#define MCFSIM_ICR1 (MCF_MBAR + 0x4d) /* Intr Ctrl reg 1 */
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#define MCFSIM_ICR2 (MCF_MBAR + 0x4e) /* Intr Ctrl reg 2 */
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#define MCFSIM_ICR3 (MCF_MBAR + 0x4f) /* Intr Ctrl reg 3 */
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#define MCFSIM_ICR4 (MCF_MBAR + 0x50) /* Intr Ctrl reg 4 */
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#define MCFSIM_ICR5 (MCF_MBAR + 0x51) /* Intr Ctrl reg 5 */
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#define MCFSIM_ICR6 (MCF_MBAR + 0x52) /* Intr Ctrl reg 6 */
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#define MCFSIM_ICR7 (MCF_MBAR + 0x53) /* Intr Ctrl reg 7 */
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#define MCFSIM_ICR8 (MCF_MBAR + 0x54) /* Intr Ctrl reg 8 */
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#define MCFSIM_ICR9 (MCF_MBAR + 0x55) /* Intr Ctrl reg 9 */
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#define MCFSIM_ICR10 (MCF_MBAR + 0x56) /* Intr Ctrl reg 10 */
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#define MCFSIM_ICR11 (MCF_MBAR + 0x57) /* Intr Ctrl reg 11 */
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#define MCFSIM_CSAR0 (MCF_MBAR + 0x80) /* CS 0 Address reg */
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#define MCFSIM_CSMR0 (MCF_MBAR + 0x84) /* CS 0 Mask reg */
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#define MCFSIM_CSCR0 (MCF_MBAR + 0x8a) /* CS 0 Control reg */
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#define MCFSIM_CSAR1 (MCF_MBAR + 0x8c) /* CS 1 Address reg */
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#define MCFSIM_CSMR1 (MCF_MBAR + 0x90) /* CS 1 Mask reg */
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#define MCFSIM_CSCR1 (MCF_MBAR + 0x96) /* CS 1 Control reg */
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#define MCFSIM_CSAR2 (MCF_MBAR + 0x98) /* CS 2 Address reg */
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#define MCFSIM_CSMR2 (MCF_MBAR + 0x9c) /* CS 2 Mask reg */
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#define MCFSIM_CSCR2 (MCF_MBAR + 0xa2) /* CS 2 Control reg */
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#define MCFSIM_CSAR3 (MCF_MBAR + 0xa4) /* CS 3 Address reg */
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#define MCFSIM_CSMR3 (MCF_MBAR + 0xa8) /* CS 3 Mask reg */
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#define MCFSIM_CSCR3 (MCF_MBAR + 0xae) /* CS 3 Control reg */
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#define MCFSIM_CSAR4 (MCF_MBAR + 0xb0) /* CS 4 Address reg */
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#define MCFSIM_CSMR4 (MCF_MBAR + 0xb4) /* CS 4 Mask reg */
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#define MCFSIM_CSCR4 (MCF_MBAR + 0xba) /* CS 4 Control reg */
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#define MCFSIM_CSAR5 (MCF_MBAR + 0xbc) /* CS 5 Address reg */
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#define MCFSIM_CSMR5 (MCF_MBAR + 0xc0) /* CS 5 Mask reg */
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#define MCFSIM_CSCR5 (MCF_MBAR + 0xc6) /* CS 5 Control reg */
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#define MCFSIM_CSAR6 (MCF_MBAR + 0xc8) /* CS 6 Address reg */
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#define MCFSIM_CSMR6 (MCF_MBAR + 0xcc) /* CS 6 Mask reg */
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#define MCFSIM_CSCR6 (MCF_MBAR + 0xd2) /* CS 6 Control reg */
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#define MCFSIM_CSAR7 (MCF_MBAR + 0xd4) /* CS 7 Address reg */
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#define MCFSIM_CSMR7 (MCF_MBAR + 0xd8) /* CS 7 Mask reg */
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#define MCFSIM_CSCR7 (MCF_MBAR + 0xde) /* CS 7 Control reg */
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#define MCFSIM_DCR (MCF_MBAR + 0x100) /* DRAM Control */
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#define MCFSIM_DACR0 (MCF_MBAR + 0x108) /* DRAM 0 Addr/Ctrl */
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#define MCFSIM_DMR0 (MCF_MBAR + 0x10c) /* DRAM 0 Mask */
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#define MCFSIM_DACR1 (MCF_MBAR + 0x110) /* DRAM 1 Addr/Ctrl */
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#define MCFSIM_DMR1 (MCF_MBAR + 0x114) /* DRAM 1 Mask */
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/*
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* Timer module.
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*/
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#define MCFTIMER_BASE1 (MCF_MBAR + 0x140) /* Base of TIMER1 */
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#define MCFTIMER_BASE2 (MCF_MBAR + 0x180) /* Base of TIMER2 */
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#define MCFUART_BASE0 (MCF_MBAR + 0x1c0) /* Base address UART0 */
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#define MCFUART_BASE1 (MCF_MBAR + 0x200) /* Base address UART1 */
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#define MCFSIM_PADDR (MCF_MBAR + 0x244)
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#define MCFSIM_PADAT (MCF_MBAR + 0x248)
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/*
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* DMA unit base addresses.
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*/
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#define MCFDMA_BASE0 (MCF_MBAR + 0x300) /* Base address DMA 0 */
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#define MCFDMA_BASE1 (MCF_MBAR + 0x340) /* Base address DMA 1 */
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#define MCFDMA_BASE2 (MCF_MBAR + 0x380) /* Base address DMA 2 */
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#define MCFDMA_BASE3 (MCF_MBAR + 0x3C0) /* Base address DMA 3 */
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/*
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* Generic GPIO support
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*/
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#define MCFGPIO_PIN_MAX 16
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#define MCFGPIO_IRQ_MAX -1
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#define MCFGPIO_IRQ_VECBASE -1
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/*
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* Some symbol defines for the above...
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*/
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#define MCFSIM_SWDICR MCFSIM_ICR0 /* Watchdog timer ICR */
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#define MCFSIM_TIMER1ICR MCFSIM_ICR1 /* Timer 1 ICR */
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#define MCFSIM_TIMER2ICR MCFSIM_ICR2 /* Timer 2 ICR */
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#define MCFSIM_I2CICR MCFSIM_ICR3 /* I2C ICR */
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#define MCFSIM_UART1ICR MCFSIM_ICR4 /* UART 1 ICR */
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#define MCFSIM_UART2ICR MCFSIM_ICR5 /* UART 2 ICR */
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#define MCFSIM_DMA0ICR MCFSIM_ICR6 /* DMA 0 ICR */
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#define MCFSIM_DMA1ICR MCFSIM_ICR7 /* DMA 1 ICR */
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#define MCFSIM_DMA2ICR MCFSIM_ICR8 /* DMA 2 ICR */
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#define MCFSIM_DMA3ICR MCFSIM_ICR9 /* DMA 3 ICR */
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/*
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* Some symbol defines for the Parallel Port Pin Assignment Register
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*/
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#define MCFSIM_PAR_DREQ0 0x40 /* Set to select DREQ0 input */
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/* Clear to select par I/O */
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#define MCFSIM_PAR_DREQ1 0x20 /* Select DREQ1 input */
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/* Clear to select par I/O */
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/*
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* Defines for the IRQPAR Register
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*/
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#define IRQ5_LEVEL4 0x80
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#define IRQ3_LEVEL6 0x40
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#define IRQ1_LEVEL2 0x20
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/*
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* Define system peripheral IRQ usage.
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*/
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#define MCF_IRQ_I2C0 29 /* I2C, Level 5 */
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#define MCF_IRQ_TIMER 30 /* Timer0, Level 6 */
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#define MCF_IRQ_PROFILER 31 /* Timer1, Level 7 */
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#define MCF_IRQ_UART0 73 /* UART0 */
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#define MCF_IRQ_UART1 74 /* UART1 */
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/*
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* I2C module
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*/
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#define MCFI2C_BASE0 (MCF_MBAR + 0x280)
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#define MCFI2C_SIZE0 0x40
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/****************************************************************************/
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#endif /* m5407sim_h */
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