forked from luck/tmp_suning_uos_patched
1b6b8ce2ac
PCIe 1.1 base neither requires the endpoint to implement the entire PCIe capability structure nor specifies default values of registers that are not implemented by the device. So we only save and restore registers that must be implemented by different device types if the device PCIe capability version is 1. PCIe 1.1 Capability Structure Expansion ECN and PCIe 2.0 requires all registers in the PCIe capability to be either implemented or hardwired to 0. Their PCIe capability version is 2. Signed-off-by: Yu Zhao <yu.zhao@intel.com> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org> |
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.. | ||
hotplug | ||
pcie | ||
.gitignore | ||
access.c | ||
bus.c | ||
dmar.c | ||
hotplug-pci.c | ||
hotplug.c | ||
htirq.c | ||
intel-iommu.c | ||
intr_remapping.c | ||
intr_remapping.h | ||
iov.c | ||
iova.c | ||
irq.c | ||
Kconfig | ||
Makefile | ||
msi.c | ||
msi.h | ||
pci-acpi.c | ||
pci-driver.c | ||
pci-stub.c | ||
pci-sysfs.c | ||
pci.c | ||
pci.h | ||
probe.c | ||
proc.c | ||
quirks.c | ||
remove.c | ||
rom.c | ||
search.c | ||
setup-bus.c | ||
setup-irq.c | ||
setup-res.c | ||
slot.c | ||
syscall.c |