forked from luck/tmp_suning_uos_patched
fde46e9682
Add the SCB onto the scsi command allocation and use dma streaming mappings for it only when in use. This avoid possibly calling dma_alloc_coherent under a lock or even in irq context, while also making the code simpler. Thanks to Ondrej Zary for testing and various bug fixes. Signed-off-by: Christoph Hellwig <hch@lst.de> Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
248 lines
9.5 KiB
C
248 lines
9.5 KiB
C
/* SPDX-License-Identifier: GPL-2.0 */
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#ifndef _WD719X_H_
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#define _WD719X_H_
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#define WD719X_SG 255 /* Scatter/gather size */
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struct wd719x_sglist {
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__le32 ptr;
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__le32 length;
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} __packed;
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enum wd719x_card_type {
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WD719X_TYPE_UNKNOWN = 0,
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WD719X_TYPE_7193,
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WD719X_TYPE_7197,
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WD719X_TYPE_7296,
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};
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union wd719x_regs {
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__le32 all; /* All Status at once */
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struct {
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u8 OPC; /* Opcode register */
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u8 SCSI; /* SCSI Errors */
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u8 SUE; /* Spider unique Errors */
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u8 INT; /* Interrupt Status */
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} bytes;
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};
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/* Spider Command Block (SCB) */
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struct wd719x_scb {
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__le32 Int_SCB; /* 00-03 Internal SCB link pointer (must be cleared) */
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u8 SCB_opcode; /* 04 SCB Command opcode */
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u8 CDB_tag; /* 05 SCSI Tag byte for CDB queues (0 if untagged) */
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u8 lun; /* 06 SCSI LUN */
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u8 devid; /* 07 SCSI Device ID */
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u8 CDB[16]; /* 08-23 SCSI CDB (16 bytes as defined by ANSI spec. */
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__le32 data_p; /* 24-27 Data transfer address (or SG list address) */
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__le32 data_length; /* 28-31 Data transfer Length (or SG list length) */
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__le32 CDB_link; /* 32-35 SCSI CDB Link Ptr */
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__le32 sense_buf; /* 36-39 Auto request sense buffer address */
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u8 sense_buf_length;/* 40 Auto request sense transfer length */
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u8 reserved; /* 41 reserved */
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u8 SCB_options; /* 42 SCB-options */
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u8 SCB_tag_msg; /* 43 Tagged messages options */
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/* Not filled in by host */
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__le32 req_ptr; /* 44-47 Ptr to Host Request returned on interrupt */
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u8 host_opcode; /* 48 Host Command Opcode (same as AMR_00) */
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u8 scsi_stat; /* 49 SCSI Status returned */
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u8 ret_error; /* 50 SPIDER Unique Error Code returned (SUE) */
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u8 int_stat; /* 51 Message u8 / Interrupt Status byte returned */
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__le32 transferred; /* 52-55 Bytes Transferred */
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u8 last_trans[3]; /* 56-58 Bytes Transferred in last session */
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u8 length; /* 59 SCSI Messages Length (1-8) */
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u8 sync_offset; /* 60 Synchronous offset */
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u8 sync_rate; /* 61 Synchronous rate */
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u8 flags[2]; /* 62-63 SCB specific flags (local to each thread) */
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/* everything below is for driver use (not used by card) */
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dma_addr_t phys; /* bus address of the SCB */
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struct scsi_cmnd *cmd; /* a copy of the pointer we were passed */
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struct list_head list;
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struct wd719x_sglist sg_list[WD719X_SG] __aligned(8); /* SG list */
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} __packed;
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struct wd719x {
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struct Scsi_Host *sh; /* pointer to host structure */
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struct pci_dev *pdev;
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void __iomem *base;
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enum wd719x_card_type type; /* type of card */
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void *fw_virt; /* firmware buffer CPU address */
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dma_addr_t fw_phys; /* firmware buffer bus address */
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size_t fw_size; /* firmware buffer size */
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struct wd719x_host_param *params; /* host parameters (EEPROM) */
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dma_addr_t params_phys; /* host parameters bus address */
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void *hash_virt; /* hash table CPU address */
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dma_addr_t hash_phys; /* hash table bus address */
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struct list_head active_scbs;
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};
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/* timeout delays in microsecs */
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#define WD719X_WAIT_FOR_CMD_READY 500
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#define WD719X_WAIT_FOR_RISC 2000
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#define WD719X_WAIT_FOR_SCSI_RESET 3000000
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/* All commands except 0x00 generate an interrupt */
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#define WD719X_CMD_READY 0x00 /* Command register ready (or noop) */
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#define WD719X_CMD_INIT_RISC 0x01 /* Initialize RISC */
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/* 0x02 is reserved */
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#define WD719X_CMD_BUSRESET 0x03 /* Assert SCSI bus reset */
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#define WD719X_CMD_READ_FIRMVER 0x04 /* Read the Firmware Revision */
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#define WD719X_CMD_ECHO_BYTES 0x05 /* Echo command bytes (DW) */
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/* 0x06 is reserved */
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/* 0x07 is reserved */
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#define WD719X_CMD_GET_PARAM 0x08 /* Get programmable parameters */
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#define WD719X_CMD_SET_PARAM 0x09 /* Set programmable parameters */
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#define WD719X_CMD_SLEEP 0x0a /* Put SPIDER to sleep */
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#define WD719X_CMD_READ_INIT 0x0b /* Read initialization parameters */
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#define WD719X_CMD_RESTORE_INIT 0x0c /* Restore initialization parameters */
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/* 0x0d is reserved */
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/* 0x0e is reserved */
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/* 0x0f is reserved */
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#define WD719X_CMD_ABORT_TAG 0x10 /* Send Abort tag message to target */
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#define WD719X_CMD_ABORT 0x11 /* Send Abort message to target */
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#define WD719X_CMD_RESET 0x12 /* Send Reset message to target */
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#define WD719X_CMD_INIT_SCAM 0x13 /* Initiate SCAM */
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#define WD719X_CMD_GET_SYNC 0x14 /* Get synchronous rates */
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#define WD719X_CMD_SET_SYNC 0x15 /* Set synchronous rates */
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#define WD719X_CMD_GET_WIDTH 0x16 /* Get SCSI bus width */
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#define WD719X_CMD_SET_WIDTH 0x17 /* Set SCSI bus width */
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#define WD719X_CMD_GET_TAGS 0x18 /* Get tag flags */
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#define WD719X_CMD_SET_TAGS 0x19 /* Set tag flags */
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#define WD719X_CMD_GET_PARAM2 0x1a /* Get programmable params (format 2) */
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#define WD719X_CMD_SET_PARAM2 0x1b /* Set programmable params (format 2) */
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/* Commands with request pointers (mailbox) */
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#define WD719X_CMD_PROCESS_SCB 0x80 /* Process SCSI Control Block (SCB) */
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/* No interrupt generated on acceptance of SCB pointer */
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/* interrupt status defines */
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#define WD719X_INT_NONE 0x00 /* No interrupt pending */
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#define WD719X_INT_NOERRORS 0x01 /* Command completed with no errors */
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#define WD719X_INT_LINKNOERRORS 0x02 /* link cmd completed with no errors */
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#define WD719X_INT_LINKNOSTATUS 0x03 /* link cmd completed with no flag set */
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#define WD719X_INT_ERRORSLOGGED 0x04 /* cmd completed with errors logged */
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#define WD719X_INT_SPIDERFAILED 0x05 /* cmd failed without valid SCSI status */
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#define WD719X_INT_BADINT 0x80 /* unsolicited interrupt */
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#define WD719X_INT_PIOREADY 0xf0 /* data ready for PIO output */
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/* Spider Unique Error Codes (SUE) */
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#define WD719X_SUE_NOERRORS 0x00 /* No errors detected by SPIDER */
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#define WD719X_SUE_REJECTED 0x01 /* Command Rejected (bad opcode/param) */
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#define WD719X_SUE_SCBQFULL 0x02 /* SCB queue full */
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/* 0x03 is reserved */
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#define WD719X_SUE_TERM 0x04 /* Host terminated SCB via primative cmd */
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#define WD719X_SUE_CHAN1PAR 0x05 /* PCI Channel 1 parity error occurred */
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#define WD719X_SUE_CHAN1ABORT 0x06 /* PCI Channel 1 system abort occurred */
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#define WD719X_SUE_CHAN23PAR 0x07 /* PCI Channel 2/3 parity error occurred */
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#define WD719X_SUE_CHAN23ABORT 0x08 /* PCI Channel 2/3 system abort occurred */
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#define WD719X_SUE_TIMEOUT 0x10 /* Selection/reselection timeout */
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#define WD719X_SUE_RESET 0x11 /* SCSI bus reset occurred */
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#define WD719X_SUE_BUSERROR 0x12 /* SCSI bus error */
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#define WD719X_SUE_WRONGWAY 0x13 /* Wrong data transfer dir set by target */
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#define WD719X_SUE_BADPHASE 0x14 /* SCSI phase illegal or unexpected */
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#define WD719X_SUE_TOOLONG 0x15 /* target requested too much data */
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#define WD719X_SUE_BUSFREE 0x16 /* Unexpected SCSI bus free */
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#define WD719X_SUE_ARSDONE 0x17 /* Auto request sense executed */
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#define WD719X_SUE_IGNORED 0x18 /* SCSI message was ignored by target */
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#define WD719X_SUE_WRONGTAGS 0x19 /* Tagged SCB & tags off (or vice versa) */
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#define WD719X_SUE_BADTAGS 0x1a /* Wrong tag message type for target */
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#define WD719X_SUE_NOSCAMID 0x1b /* No SCAM soft ID available */
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/* code sizes */
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#define WD719X_HASH_TABLE_SIZE 4096
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/* Advanced Mode Registers */
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/* Regs 0x00..0x1f are for Advanced Mode of the card (RISC is running). */
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#define WD719X_AMR_COMMAND 0x00
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#define WD719X_AMR_CMD_PARAM 0x01
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#define WD719X_AMR_CMD_PARAM_2 0x02
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#define WD719X_AMR_CMD_PARAM_3 0x03
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#define WD719X_AMR_SCB_IN 0x04
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#define WD719X_AMR_BIOS_SHARE_INT 0x0f
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#define WD719X_AMR_SCB_OUT 0x18
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#define WD719X_AMR_OP_CODE 0x1c
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#define WD719X_AMR_SCSI_STATUS 0x1d
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#define WD719X_AMR_SCB_ERROR 0x1e
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#define WD719X_AMR_INT_STATUS 0x1f
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#define WD719X_DISABLE_INT 0x80
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/* SCB flags */
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#define WD719X_SCB_FLAGS_CHECK_DIRECTION 0x01
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#define WD719X_SCB_FLAGS_PCI_TO_SCSI 0x02
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#define WD719X_SCB_FLAGS_AUTO_REQUEST_SENSE 0x10
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#define WD719X_SCB_FLAGS_DO_SCATTER_GATHER 0x20
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#define WD719X_SCB_FLAGS_NO_DISCONNECT 0x40
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/* PCI Registers used for reset, initial code download */
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/* Regs 0x20..0x3f are for Normal (DOS) mode (RISC is asleep). */
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#define WD719X_PCI_GPIO_CONTROL 0x3C
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#define WD719X_PCI_GPIO_DATA 0x3D
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#define WD719X_PCI_PORT_RESET 0x3E
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#define WD719X_PCI_MODE_SELECT 0x3F
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#define WD719X_PCI_EXTERNAL_ADDR 0x60
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#define WD719X_PCI_INTERNAL_ADDR 0x64
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#define WD719X_PCI_DMA_TRANSFER_SIZE 0x66
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#define WD719X_PCI_CHANNEL2_3CMD 0x68
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#define WD719X_PCI_CHANNEL2_3STATUS 0x69
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#define WD719X_GPIO_ID_BITS 0x0a
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#define WD719X_PRAM_BASE_ADDR 0x00
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/* codes written to or read from the card */
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#define WD719X_PCI_RESET 0x01
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#define WD719X_ENABLE_ADVANCE_MODE 0x01
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#define WD719X_START_CHANNEL2_3DMA 0x17
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#define WD719X_START_CHANNEL2_3DONE 0x01
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#define WD719X_START_CHANNEL2_3ABORT 0x20
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/* 33C296 GPIO bits for EEPROM pins */
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#define WD719X_EE_DI (1 << 1)
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#define WD719X_EE_CS (1 << 2)
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#define WD719X_EE_CLK (1 << 3)
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#define WD719X_EE_DO (1 << 4)
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/* EEPROM contents */
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struct wd719x_eeprom_header {
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u8 sig1;
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u8 sig2;
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u8 version;
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u8 checksum;
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u8 cfg_offset;
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u8 cfg_size;
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u8 setup_offset;
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u8 setup_size;
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} __packed;
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#define WD719X_EE_SIG1 0
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#define WD719X_EE_SIG2 1
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#define WD719X_EE_VERSION 2
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#define WD719X_EE_CHECKSUM 3
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#define WD719X_EE_CFG_OFFSET 4
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#define WD719X_EE_CFG_SIZE 5
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#define WD719X_EE_SETUP_OFFSET 6
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#define WD719X_EE_SETUP_SIZE 7
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#define WD719X_EE_SCSI_ID_MASK 0xf
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/* SPIDER Host Parameters Block (=EEPROM configuration block) */
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struct wd719x_host_param {
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u8 ch_1_th; /* FIFO threshold */
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u8 scsi_conf; /* SCSI configuration */
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u8 own_scsi_id; /* controller SCSI ID */
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u8 sel_timeout; /* selection timeout*/
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u8 sleep_timer; /* seep timer */
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__le16 cdb_size;/* CDB size groups */
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__le16 tag_en; /* Tag msg enables (ID 0-15) */
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u8 scsi_pad; /* SCSI pad control */
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__le32 wide; /* WIDE msg options (ID 0-15) */
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__le32 sync; /* SYNC msg options (ID 0-15) */
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u8 soft_mask; /* soft error mask */
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u8 unsol_mask; /* unsolicited error mask */
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} __packed;
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#endif /* _WD719X_H_ */
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