forked from luck/tmp_suning_uos_patched
ede9622162
Add an ARM NEON-accelerated implementation of Speck-XTS. It operates on
128-byte chunks at a time, i.e. 8 blocks for Speck128 or 16 blocks for
Speck64. Each 128-byte chunk goes through XTS preprocessing, then is
encrypted/decrypted (doing one cipher round for all the blocks, then the
next round, etc.), then goes through XTS postprocessing.
The performance depends on the processor but can be about 3 times faster
than the generic code. For example, on an ARMv7 processor we observe
the following performance with Speck128/256-XTS:
xts-speck128-neon: Encryption 107.9 MB/s, Decryption 108.1 MB/s
xts(speck128-generic): Encryption 32.1 MB/s, Decryption 36.6 MB/s
In comparison to AES-256-XTS without the Cryptography Extensions:
xts-aes-neonbs: Encryption 41.2 MB/s, Decryption 36.7 MB/s
xts(aes-asm): Encryption 31.7 MB/s, Decryption 30.8 MB/s
xts(aes-generic): Encryption 21.2 MB/s, Decryption 20.9 MB/s
Speck64/128-XTS is even faster:
xts-speck64-neon: Encryption 138.6 MB/s, Decryption 139.1 MB/s
Note that as with the generic code, only the Speck128 and Speck64
variants are supported. Also, for now only the XTS mode of operation is
supported, to target the disk and file encryption use cases. The NEON
code also only handles the portion of the data that is evenly divisible
into 128-byte chunks, with any remainder handled by a C fallback. Of
course, other modes of operation could be added later if needed, and/or
the NEON code could be updated to handle other buffer sizes.
The XTS specification is only defined for AES which has a 128-bit block
size, so for the GF(2^64) math needed for Speck64-XTS we use the
reducing polynomial 'x^64 + x^4 + x^3 + x + 1' given by the original XEX
paper. Of course, when possible users should use Speck128-XTS, but even
that may be too slow on some processors; Speck64-XTS can be faster.
Signed-off-by: Eric Biggers <ebiggers@google.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
131 lines
3.9 KiB
Plaintext
131 lines
3.9 KiB
Plaintext
# SPDX-License-Identifier: GPL-2.0
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menuconfig ARM_CRYPTO
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bool "ARM Accelerated Cryptographic Algorithms"
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depends on ARM
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help
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Say Y here to choose from a selection of cryptographic algorithms
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implemented using ARM specific CPU features or instructions.
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if ARM_CRYPTO
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config CRYPTO_SHA1_ARM
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tristate "SHA1 digest algorithm (ARM-asm)"
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select CRYPTO_SHA1
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select CRYPTO_HASH
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help
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SHA-1 secure hash standard (FIPS 180-1/DFIPS 180-2) implemented
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using optimized ARM assembler.
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config CRYPTO_SHA1_ARM_NEON
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tristate "SHA1 digest algorithm (ARM NEON)"
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depends on KERNEL_MODE_NEON
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select CRYPTO_SHA1_ARM
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select CRYPTO_SHA1
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select CRYPTO_HASH
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help
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SHA-1 secure hash standard (FIPS 180-1/DFIPS 180-2) implemented
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using optimized ARM NEON assembly, when NEON instructions are
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available.
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config CRYPTO_SHA1_ARM_CE
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tristate "SHA1 digest algorithm (ARM v8 Crypto Extensions)"
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depends on KERNEL_MODE_NEON
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select CRYPTO_SHA1_ARM
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select CRYPTO_HASH
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help
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SHA-1 secure hash standard (FIPS 180-1/DFIPS 180-2) implemented
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using special ARMv8 Crypto Extensions.
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config CRYPTO_SHA2_ARM_CE
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tristate "SHA-224/256 digest algorithm (ARM v8 Crypto Extensions)"
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depends on KERNEL_MODE_NEON
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select CRYPTO_SHA256_ARM
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select CRYPTO_HASH
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help
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SHA-256 secure hash standard (DFIPS 180-2) implemented
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using special ARMv8 Crypto Extensions.
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config CRYPTO_SHA256_ARM
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tristate "SHA-224/256 digest algorithm (ARM-asm and NEON)"
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select CRYPTO_HASH
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depends on !CPU_V7M
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help
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SHA-256 secure hash standard (DFIPS 180-2) implemented
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using optimized ARM assembler and NEON, when available.
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config CRYPTO_SHA512_ARM
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tristate "SHA-384/512 digest algorithm (ARM-asm and NEON)"
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select CRYPTO_HASH
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depends on !CPU_V7M
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help
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SHA-512 secure hash standard (DFIPS 180-2) implemented
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using optimized ARM assembler and NEON, when available.
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config CRYPTO_AES_ARM
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tristate "Scalar AES cipher for ARM"
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select CRYPTO_ALGAPI
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select CRYPTO_AES
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help
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Use optimized AES assembler routines for ARM platforms.
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config CRYPTO_AES_ARM_BS
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tristate "Bit sliced AES using NEON instructions"
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depends on KERNEL_MODE_NEON
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select CRYPTO_BLKCIPHER
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select CRYPTO_SIMD
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select CRYPTO_AES
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help
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Use a faster and more secure NEON based implementation of AES in CBC,
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CTR and XTS modes
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Bit sliced AES gives around 45% speedup on Cortex-A15 for CTR mode
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and for XTS mode encryption, CBC and XTS mode decryption speedup is
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around 25%. (CBC encryption speed is not affected by this driver.)
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This implementation does not rely on any lookup tables so it is
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believed to be invulnerable to cache timing attacks.
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config CRYPTO_AES_ARM_CE
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tristate "Accelerated AES using ARMv8 Crypto Extensions"
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depends on KERNEL_MODE_NEON
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select CRYPTO_BLKCIPHER
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select CRYPTO_SIMD
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help
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Use an implementation of AES in CBC, CTR and XTS modes that uses
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ARMv8 Crypto Extensions
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config CRYPTO_GHASH_ARM_CE
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tristate "PMULL-accelerated GHASH using NEON/ARMv8 Crypto Extensions"
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depends on KERNEL_MODE_NEON
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select CRYPTO_HASH
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select CRYPTO_CRYPTD
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help
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Use an implementation of GHASH (used by the GCM AEAD chaining mode)
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that uses the 64x64 to 128 bit polynomial multiplication (vmull.p64)
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that is part of the ARMv8 Crypto Extensions, or a slower variant that
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uses the vmull.p8 instruction that is part of the basic NEON ISA.
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config CRYPTO_CRCT10DIF_ARM_CE
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tristate "CRCT10DIF digest algorithm using PMULL instructions"
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depends on KERNEL_MODE_NEON && CRC_T10DIF
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select CRYPTO_HASH
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config CRYPTO_CRC32_ARM_CE
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tristate "CRC32(C) digest algorithm using CRC and/or PMULL instructions"
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depends on KERNEL_MODE_NEON && CRC32
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select CRYPTO_HASH
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config CRYPTO_CHACHA20_NEON
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tristate "NEON accelerated ChaCha20 symmetric cipher"
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depends on KERNEL_MODE_NEON
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select CRYPTO_BLKCIPHER
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select CRYPTO_CHACHA20
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config CRYPTO_SPECK_NEON
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tristate "NEON accelerated Speck cipher algorithms"
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depends on KERNEL_MODE_NEON
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select CRYPTO_BLKCIPHER
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select CRYPTO_SPECK
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endif
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