forked from luck/tmp_suning_uos_patched
5af67635c3
The documentation for Marvell's cp110 phy refers to these registers/register regions as DTL control, DTL frequency loop enable, etc. This patch aligns the relevant code for these accordingly. Signed-off-by: Matt Pelland <mpelland@starry.com> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> |
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.. | ||
Kconfig | ||
Makefile | ||
phy-armada38x-comphy.c | ||
phy-armada375-usb2.c | ||
phy-berlin-sata.c | ||
phy-berlin-usb.c | ||
phy-mvebu-a3700-comphy.c | ||
phy-mvebu-a3700-utmi.c | ||
phy-mvebu-cp110-comphy.c | ||
phy-mvebu-sata.c | ||
phy-pxa-28nm-hsic.c | ||
phy-pxa-28nm-usb2.c | ||
phy-pxa-usb.c |