forked from luck/tmp_suning_uos_patched
ba49af35be
Memory for timer16_priv, timer8_priv and tpu_priv structs is allocated by devm_kzalloc() in corresponding probe functions of drivers. No need to zero it one more time. Signed-off-by: Alexey Klimov <alexey.klimov@linaro.org> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
318 lines
6.9 KiB
C
318 lines
6.9 KiB
C
/*
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* linux/arch/h8300/kernel/cpu/timer/timer8.c
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*
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* Yoshinori Sato <ysato@users.sourcefoge.jp>
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*
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* 8bit Timer driver
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*
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*/
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#include <linux/errno.h>
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#include <linux/sched.h>
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#include <linux/kernel.h>
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#include <linux/interrupt.h>
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#include <linux/init.h>
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#include <linux/platform_device.h>
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#include <linux/slab.h>
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#include <linux/clockchips.h>
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#include <linux/module.h>
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#include <linux/clk.h>
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#include <linux/io.h>
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#include <linux/of.h>
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#include <asm/irq.h>
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#define _8TCR 0
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#define _8TCSR 2
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#define TCORA 4
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#define TCORB 6
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#define _8TCNT 8
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#define FLAG_REPROGRAM (1 << 0)
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#define FLAG_SKIPEVENT (1 << 1)
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#define FLAG_IRQCONTEXT (1 << 2)
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#define FLAG_STARTED (1 << 3)
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#define ONESHOT 0
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#define PERIODIC 1
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#define RELATIVE 0
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#define ABSOLUTE 1
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struct timer8_priv {
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struct platform_device *pdev;
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struct clock_event_device ced;
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struct irqaction irqaction;
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unsigned long mapbase;
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raw_spinlock_t lock;
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unsigned long flags;
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unsigned int rate;
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unsigned int tcora;
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struct clk *pclk;
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};
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static unsigned long timer8_get_counter(struct timer8_priv *p)
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{
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unsigned long v1, v2, v3;
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int o1, o2;
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o1 = ctrl_inb(p->mapbase + _8TCSR) & 0x20;
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/* Make sure the timer value is stable. Stolen from acpi_pm.c */
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do {
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o2 = o1;
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v1 = ctrl_inw(p->mapbase + _8TCNT);
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v2 = ctrl_inw(p->mapbase + _8TCNT);
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v3 = ctrl_inw(p->mapbase + _8TCNT);
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o1 = ctrl_inb(p->mapbase + _8TCSR) & 0x20;
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} while (unlikely((o1 != o2) || (v1 > v2 && v1 < v3)
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|| (v2 > v3 && v2 < v1) || (v3 > v1 && v3 < v2)));
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v2 |= o1 << 10;
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return v2;
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}
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static irqreturn_t timer8_interrupt(int irq, void *dev_id)
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{
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struct timer8_priv *p = dev_id;
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ctrl_outb(ctrl_inb(p->mapbase + _8TCSR) & ~0x40,
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p->mapbase + _8TCSR);
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p->flags |= FLAG_IRQCONTEXT;
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ctrl_outw(p->tcora, p->mapbase + TCORA);
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if (!(p->flags & FLAG_SKIPEVENT)) {
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if (clockevent_state_oneshot(&p->ced))
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ctrl_outw(0x0000, p->mapbase + _8TCR);
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p->ced.event_handler(&p->ced);
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}
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p->flags &= ~(FLAG_SKIPEVENT | FLAG_IRQCONTEXT);
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return IRQ_HANDLED;
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}
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static void timer8_set_next(struct timer8_priv *p, unsigned long delta)
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{
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unsigned long flags;
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unsigned long now;
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raw_spin_lock_irqsave(&p->lock, flags);
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if (delta >= 0x10000)
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dev_warn(&p->pdev->dev, "delta out of range\n");
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now = timer8_get_counter(p);
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p->tcora = delta;
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ctrl_outb(ctrl_inb(p->mapbase + _8TCR) | 0x40, p->mapbase + _8TCR);
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if (delta > now)
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ctrl_outw(delta, p->mapbase + TCORA);
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else
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ctrl_outw(now + 1, p->mapbase + TCORA);
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raw_spin_unlock_irqrestore(&p->lock, flags);
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}
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static int timer8_enable(struct timer8_priv *p)
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{
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p->rate = clk_get_rate(p->pclk) / 64;
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ctrl_outw(0xffff, p->mapbase + TCORA);
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ctrl_outw(0x0000, p->mapbase + _8TCNT);
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ctrl_outw(0x0c02, p->mapbase + _8TCR);
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return 0;
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}
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static int timer8_start(struct timer8_priv *p)
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{
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int ret = 0;
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unsigned long flags;
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raw_spin_lock_irqsave(&p->lock, flags);
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if (!(p->flags & FLAG_STARTED))
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ret = timer8_enable(p);
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if (ret)
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goto out;
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p->flags |= FLAG_STARTED;
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out:
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raw_spin_unlock_irqrestore(&p->lock, flags);
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return ret;
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}
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static void timer8_stop(struct timer8_priv *p)
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{
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unsigned long flags;
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raw_spin_lock_irqsave(&p->lock, flags);
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ctrl_outw(0x0000, p->mapbase + _8TCR);
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raw_spin_unlock_irqrestore(&p->lock, flags);
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}
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static inline struct timer8_priv *ced_to_priv(struct clock_event_device *ced)
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{
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return container_of(ced, struct timer8_priv, ced);
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}
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static void timer8_clock_event_start(struct timer8_priv *p, int periodic)
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{
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struct clock_event_device *ced = &p->ced;
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timer8_start(p);
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ced->shift = 32;
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ced->mult = div_sc(p->rate, NSEC_PER_SEC, ced->shift);
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ced->max_delta_ns = clockevent_delta2ns(0xffff, ced);
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ced->min_delta_ns = clockevent_delta2ns(0x0001, ced);
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timer8_set_next(p, periodic?(p->rate + HZ/2) / HZ:0x10000);
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}
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static int timer8_clock_event_shutdown(struct clock_event_device *ced)
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{
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timer8_stop(ced_to_priv(ced));
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return 0;
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}
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static int timer8_clock_event_periodic(struct clock_event_device *ced)
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{
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struct timer8_priv *p = ced_to_priv(ced);
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dev_info(&p->pdev->dev, "used for periodic clock events\n");
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timer8_stop(p);
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timer8_clock_event_start(p, PERIODIC);
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return 0;
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}
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static int timer8_clock_event_oneshot(struct clock_event_device *ced)
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{
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struct timer8_priv *p = ced_to_priv(ced);
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dev_info(&p->pdev->dev, "used for oneshot clock events\n");
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timer8_stop(p);
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timer8_clock_event_start(p, ONESHOT);
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return 0;
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}
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static int timer8_clock_event_next(unsigned long delta,
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struct clock_event_device *ced)
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{
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struct timer8_priv *p = ced_to_priv(ced);
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BUG_ON(!clockevent_state_oneshot(ced));
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timer8_set_next(p, delta - 1);
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return 0;
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}
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static int timer8_setup(struct timer8_priv *p,
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struct platform_device *pdev)
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{
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struct resource *res;
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int irq;
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int ret;
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p->pdev = pdev;
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res = platform_get_resource(p->pdev, IORESOURCE_MEM, 0);
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if (!res) {
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dev_err(&p->pdev->dev, "failed to get I/O memory\n");
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return -ENXIO;
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}
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irq = platform_get_irq(p->pdev, 0);
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if (irq < 0) {
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dev_err(&p->pdev->dev, "failed to get irq\n");
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return -ENXIO;
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}
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p->mapbase = res->start;
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p->irqaction.name = dev_name(&p->pdev->dev);
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p->irqaction.handler = timer8_interrupt;
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p->irqaction.dev_id = p;
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p->irqaction.flags = IRQF_TIMER;
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p->pclk = clk_get(&p->pdev->dev, "fck");
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if (IS_ERR(p->pclk)) {
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dev_err(&p->pdev->dev, "can't get clk\n");
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return PTR_ERR(p->pclk);
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}
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p->ced.name = pdev->name;
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p->ced.features = CLOCK_EVT_FEAT_PERIODIC |
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CLOCK_EVT_FEAT_ONESHOT;
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p->ced.rating = 200;
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p->ced.cpumask = cpumask_of(0);
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p->ced.set_next_event = timer8_clock_event_next;
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p->ced.set_state_shutdown = timer8_clock_event_shutdown;
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p->ced.set_state_periodic = timer8_clock_event_periodic;
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p->ced.set_state_oneshot = timer8_clock_event_oneshot;
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ret = setup_irq(irq, &p->irqaction);
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if (ret < 0) {
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dev_err(&p->pdev->dev,
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"failed to request irq %d\n", irq);
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return ret;
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}
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clockevents_register_device(&p->ced);
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platform_set_drvdata(pdev, p);
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return 0;
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}
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static int timer8_probe(struct platform_device *pdev)
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{
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struct timer8_priv *p = platform_get_drvdata(pdev);
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if (p) {
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dev_info(&pdev->dev, "kept as earlytimer\n");
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return 0;
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}
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p = devm_kzalloc(&pdev->dev, sizeof(*p), GFP_KERNEL);
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if (!p)
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return -ENOMEM;
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return timer8_setup(p, pdev);
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}
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static int timer8_remove(struct platform_device *pdev)
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{
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return -EBUSY;
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}
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static const struct of_device_id timer8_of_table[] __maybe_unused = {
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{ .compatible = "renesas,8bit-timer" },
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{ }
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};
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MODULE_DEVICE_TABLE(of, timer8_of_table);
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static struct platform_driver timer8_driver = {
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.probe = timer8_probe,
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.remove = timer8_remove,
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.driver = {
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.name = "h8300-8timer",
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.of_match_table = of_match_ptr(timer8_of_table),
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}
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};
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static int __init timer8_init(void)
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{
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return platform_driver_register(&timer8_driver);
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}
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static void __exit timer8_exit(void)
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{
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platform_driver_unregister(&timer8_driver);
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}
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subsys_initcall(timer8_init);
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module_exit(timer8_exit);
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MODULE_AUTHOR("Yoshinori Sato");
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MODULE_DESCRIPTION("H8/300 8bit Timer Driver");
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MODULE_LICENSE("GPL v2");
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