forked from luck/tmp_suning_uos_patched
3467bfd340
mtocrf is a faster single-field mtcrf (move to condition register fields) instruction available in POWER4 and later processors. It can make quite a difference in performance on some implementations, so use it for CONFIG_POWER4_ONLY builds. Signed-off-by: Olof Johansson <olof@lixom.net> Signed-off-by: Paul Mackerras <paulus@samba.org>
119 lines
3.2 KiB
C
119 lines
3.2 KiB
C
#ifndef _ASM_POWERPC_ASM_COMPAT_H
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#define _ASM_POWERPC_ASM_COMPAT_H
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#include <asm/types.h>
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#ifdef __ASSEMBLY__
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# define stringify_in_c(...) __VA_ARGS__
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# define ASM_CONST(x) x
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#else
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/* This version of stringify will deal with commas... */
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# define __stringify_in_c(...) #__VA_ARGS__
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# define stringify_in_c(...) __stringify_in_c(__VA_ARGS__) " "
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# define __ASM_CONST(x) x##UL
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# define ASM_CONST(x) __ASM_CONST(x)
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#endif
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/*
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* Feature section common macros
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*
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* Note that the entries now contain offsets between the table entry
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* and the code rather than absolute code pointers in order to be
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* useable with the vdso shared library. There is also an assumption
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* that values will be negative, that is, the fixup table has to be
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* located after the code it fixes up.
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*/
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#ifdef CONFIG_PPC64
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#ifdef __powerpc64__
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/* 64 bits kernel, 64 bits code */
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#define MAKE_FTR_SECTION_ENTRY(msk, val, label, sect) \
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99: \
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.section sect,"a"; \
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.align 3; \
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98: \
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.llong msk; \
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.llong val; \
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.llong label##b-98b; \
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.llong 99b-98b; \
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.previous
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#else /* __powerpc64__ */
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/* 64 bits kernel, 32 bits code (ie. vdso32) */
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#define MAKE_FTR_SECTION_ENTRY(msk, val, label, sect) \
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99: \
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.section sect,"a"; \
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.align 3; \
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98: \
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.llong msk; \
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.llong val; \
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.long 0xffffffff; \
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.long label##b-98b; \
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.long 0xffffffff; \
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.long 99b-98b; \
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.previous
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#endif /* !__powerpc64__ */
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#else /* CONFIG_PPC64 */
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/* 32 bits kernel, 32 bits code */
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#define MAKE_FTR_SECTION_ENTRY(msk, val, label, sect) \
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99: \
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.section sect,"a"; \
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.align 2; \
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98: \
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.long msk; \
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.long val; \
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.long label##b-98b; \
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.long 99b-98b; \
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.previous
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#endif /* !CONFIG_PPC64 */
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#ifdef __powerpc64__
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/* operations for longs and pointers */
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#define PPC_LL stringify_in_c(ld)
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#define PPC_STL stringify_in_c(std)
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#define PPC_LCMPI stringify_in_c(cmpdi)
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#define PPC_LONG stringify_in_c(.llong)
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#define PPC_TLNEI stringify_in_c(tdnei)
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#define PPC_LLARX stringify_in_c(ldarx)
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#define PPC_STLCX stringify_in_c(stdcx.)
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#define PPC_CNTLZL stringify_in_c(cntlzd)
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/* Move to CR, single-entry optimized version. Only available
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* on POWER4 and later.
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*/
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#ifdef CONFIG_POWER4_ONLY
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#define PPC_MTOCRF stringify_in_c(mtocrf)
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#else
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#define PPC_MTOCRF stringify_in_c(mtcrf)
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#endif
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#else /* 32-bit */
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/* operations for longs and pointers */
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#define PPC_LL stringify_in_c(lwz)
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#define PPC_STL stringify_in_c(stw)
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#define PPC_LCMPI stringify_in_c(cmpwi)
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#define PPC_LONG stringify_in_c(.long)
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#define PPC_TLNEI stringify_in_c(twnei)
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#define PPC_LLARX stringify_in_c(lwarx)
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#define PPC_STLCX stringify_in_c(stwcx.)
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#define PPC_CNTLZL stringify_in_c(cntlzw)
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#define PPC_MTOCRF stringify_in_c(mtcrf)
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#endif
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#ifdef __KERNEL__
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#ifdef CONFIG_IBM405_ERR77
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/* Erratum #77 on the 405 means we need a sync or dcbt before every
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* stwcx. The old ATOMIC_SYNC_FIX covered some but not all of this.
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*/
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#define PPC405_ERR77(ra,rb) stringify_in_c(dcbt ra, rb;)
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#define PPC405_ERR77_SYNC stringify_in_c(sync;)
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#else
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#define PPC405_ERR77(ra,rb)
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#define PPC405_ERR77_SYNC
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#endif
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#endif
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#endif /* _ASM_POWERPC_ASM_COMPAT_H */
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