forked from luck/tmp_suning_uos_patched
f80dff9da0
get_irqnr_preamble allows machines to take some action before entering the get_irqnr_and_base loop. On iop we enable cp6 access. arch_ret_to_user is added to the userspace return path to allow individual architectures to take actions, like disabling coprocessor access, before the final return to userspace. Per Nicolas Pitre's note, there is no need to cp_wait on the return to user as the latency to return is sufficient. Signed-off-by: Dan Williams <dan.j.williams@intel.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
79 lines
1.8 KiB
ArmAsm
79 lines
1.8 KiB
ArmAsm
/*
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* include/asm-arm/arch-s3c2410/entry-macro.S
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*
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* Low-level IRQ helper macros for S3C2410-based platforms
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*
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* This file is licensed under the terms of the GNU General Public
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* License version 2. This program is licensed "as is" without any
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* warranty of any kind, whether express or implied.
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*/
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/* We have a problem that the INTOFFSET register does not always
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* show one interrupt. Occasionally we get two interrupts through
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* the prioritiser, and this causes the INTOFFSET register to show
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* what looks like the logical-or of the two interrupt numbers.
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*
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* Thanks to Klaus, Shannon, et al for helping to debug this problem
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*/
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#define INTPND (0x10)
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#define INTOFFSET (0x14)
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#include <asm/hardware.h>
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#include <asm/irq.h>
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.macro get_irqnr_preamble, base, tmp
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.endm
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.macro arch_ret_to_user, tmp1, tmp2
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.endm
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.macro get_irqnr_and_base, irqnr, irqstat, base, tmp
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mov \base, #S3C24XX_VA_IRQ
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@@ try the interrupt offset register, since it is there
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ldr \irqstat, [ \base, #INTPND ]
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teq \irqstat, #0
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beq 1002f
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ldr \irqnr, [ \base, #INTOFFSET ]
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mov \tmp, #1
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tst \irqstat, \tmp, lsl \irqnr
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bne 1001f
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@@ the number specified is not a valid irq, so try
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@@ and work it out for ourselves
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mov \irqnr, #0 @@ start here
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@@ work out which irq (if any) we got
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movs \tmp, \irqstat, lsl#16
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addeq \irqnr, \irqnr, #16
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moveq \irqstat, \irqstat, lsr#16
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tst \irqstat, #0xff
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addeq \irqnr, \irqnr, #8
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moveq \irqstat, \irqstat, lsr#8
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tst \irqstat, #0xf
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addeq \irqnr, \irqnr, #4
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moveq \irqstat, \irqstat, lsr#4
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tst \irqstat, #0x3
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addeq \irqnr, \irqnr, #2
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moveq \irqstat, \irqstat, lsr#2
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tst \irqstat, #0x1
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addeq \irqnr, \irqnr, #1
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@@ we have the value
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1001:
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adds \irqnr, \irqnr, #IRQ_EINT0
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1002:
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@@ exit here, Z flag unset if IRQ
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.endm
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/* currently don't need an disable_fiq macro */
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.macro disable_fiq
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.endm
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