forked from luck/tmp_suning_uos_patched
7520fa9924
Add support for the Cluster PMU part of the ARM DynamIQ Shared Unit (DSU). The DSU integrates one or more cores with an L3 memory system, control logic, and external interfaces to form a multicore cluster. The PMU allows counting the various events related to L3, SCU etc, along with providing a cycle counter. The PMU can be accessed via system registers, which are common to the cores in the same cluster. The PMU registers follow the semantics of the ARMv8 PMU, mostly, with the exception that the counters record the cluster wide events. This driver is mostly based on the ARMv8 and CCI PMU drivers. The driver only supports ARM64 at the moment. It can be extended to support ARM32 by providing register accessors like we do in arch/arm64/include/arm_dsu_pmu.h. Cc: Mark Rutland <mark.rutland@arm.com> Cc: Will Deacon <will.deacon@arm.com> Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Reviewed-by: Mark Rutland <mark.rutland@arm.com> Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com> Signed-off-by: Will Deacon <will.deacon@arm.com>
29 lines
1.2 KiB
Plaintext
29 lines
1.2 KiB
Plaintext
ARM DynamIQ Shared Unit (DSU) PMU
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==================================
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ARM DynamIQ Shared Unit integrates one or more cores with an L3 memory system,
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control logic and external interfaces to form a multicore cluster. The PMU
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allows counting the various events related to the L3 cache, Snoop Control Unit
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etc, using 32bit independent counters. It also provides a 64bit cycle counter.
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The PMU can only be accessed via CPU system registers and are common to the
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cores connected to the same DSU. Like most of the other uncore PMUs, DSU
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PMU doesn't support process specific events and cannot be used in sampling mode.
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The DSU provides a bitmap for a subset of implemented events via hardware
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registers. There is no way for the driver to determine if the other events
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are available or not. Hence the driver exposes only those events advertised
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by the DSU, in "events" directory under :
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/sys/bus/event_sources/devices/arm_dsu_<N>/
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The user should refer to the TRM of the product to figure out the supported events
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and use the raw event code for the unlisted events.
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The driver also exposes the CPUs connected to the DSU instance in "associated_cpus".
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e.g usage :
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perf stat -a -e arm_dsu_0/cycles/
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