forked from luck/tmp_suning_uos_patched
137fd45ffe
The i.MX PWM version2 is embedded in several i.MX SoCs, such as i.MX27, i.MX51 and i.MX6SL. There is a 4-word (16 bit) sample FIFO in this IP. Each FIFO slot determines the duty period of a PWM waveform in one full cycle. The IP spec mentions that we should not write a fourth sample because the FIFO will become full and triggers a FIFO write error (FWE) which will prevent the PWM from starting once it is enabled. In order to avoid any sample FIFO overflow issue, this patch clears all sample FIFO by doing software reset in the configuration hook when the controller is disabled or waits for a full PWM cycle to get a relinquished FIFO slot when the controller is enabled and the FIFO is fully loaded. The FIFO overflow issue can be reproduced by the following commands on the i.MX6SL EVK platform, assuming we use PWM2 for the debug LED which is driven by the pin HSIC_STROBE and the maximal brightness is 255. echo 0 > /sys/class/leds/user/brightness echo 0 > /sys/class/leds/user/brightness echo 0 > /sys/class/leds/user/brightness echo 0 > /sys/class/leds/user/brightness echo 255 > /sys/class/leds/user/brightness Here, FWE happens (PWMSR register reads 0x58) and the LED can not be lighten. Another way to reproduce the FIFO overflow issue is to run this script: while true; do echo 255 > /sys/class/leds/user/brightness; done Cc: Thierry Reding <thierry.reding@gmail.com> Cc: Sascha Hauer <s.hauer@pengutronix.de> Cc: Shawn Guo <shawn.guo@freescale.com> Cc: Lothar Waßmann <LW@KARO-electronics.de> Cc: linux-pwm@vger.kernel.org Cc: linux-arm-kernel@lists.infradead.org Signed-off-by: Liu Ying <Ying.Liu@freescale.com> Acked-by: Shawn Guo <shawn.guo@freescale.com> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
350 lines
8.7 KiB
C
350 lines
8.7 KiB
C
/*
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* simple driver for PWM (Pulse Width Modulator) controller
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* Derived from pxa PWM driver by eric miao <eric.miao@marvell.com>
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*/
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#include <linux/module.h>
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#include <linux/kernel.h>
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#include <linux/platform_device.h>
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#include <linux/slab.h>
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#include <linux/err.h>
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#include <linux/clk.h>
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#include <linux/delay.h>
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#include <linux/io.h>
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#include <linux/pwm.h>
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#include <linux/of.h>
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#include <linux/of_device.h>
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/* i.MX1 and i.MX21 share the same PWM function block: */
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#define MX1_PWMC 0x00 /* PWM Control Register */
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#define MX1_PWMS 0x04 /* PWM Sample Register */
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#define MX1_PWMP 0x08 /* PWM Period Register */
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#define MX1_PWMC_EN (1 << 4)
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/* i.MX27, i.MX31, i.MX35 share the same PWM function block: */
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#define MX3_PWMCR 0x00 /* PWM Control Register */
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#define MX3_PWMSR 0x04 /* PWM Status Register */
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#define MX3_PWMSAR 0x0C /* PWM Sample Register */
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#define MX3_PWMPR 0x10 /* PWM Period Register */
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#define MX3_PWMCR_PRESCALER(x) ((((x) - 1) & 0xFFF) << 4)
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#define MX3_PWMCR_DOZEEN (1 << 24)
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#define MX3_PWMCR_WAITEN (1 << 23)
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#define MX3_PWMCR_DBGEN (1 << 22)
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#define MX3_PWMCR_CLKSRC_IPG_HIGH (2 << 16)
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#define MX3_PWMCR_CLKSRC_IPG (1 << 16)
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#define MX3_PWMCR_SWR (1 << 3)
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#define MX3_PWMCR_EN (1 << 0)
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#define MX3_PWMSR_FIFOAV_4WORDS 0x4
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#define MX3_PWMSR_FIFOAV_MASK 0x7
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#define MX3_PWM_SWR_LOOP 5
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struct imx_chip {
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struct clk *clk_per;
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struct clk *clk_ipg;
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void __iomem *mmio_base;
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struct pwm_chip chip;
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int (*config)(struct pwm_chip *chip,
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struct pwm_device *pwm, int duty_ns, int period_ns);
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void (*set_enable)(struct pwm_chip *chip, bool enable);
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};
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#define to_imx_chip(chip) container_of(chip, struct imx_chip, chip)
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static int imx_pwm_config_v1(struct pwm_chip *chip,
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struct pwm_device *pwm, int duty_ns, int period_ns)
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{
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struct imx_chip *imx = to_imx_chip(chip);
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/*
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* The PWM subsystem allows for exact frequencies. However,
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* I cannot connect a scope on my device to the PWM line and
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* thus cannot provide the program the PWM controller
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* exactly. Instead, I'm relying on the fact that the
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* Bootloader (u-boot or WinCE+haret) has programmed the PWM
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* function group already. So I'll just modify the PWM sample
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* register to follow the ratio of duty_ns vs. period_ns
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* accordingly.
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*
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* This is good enough for programming the brightness of
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* the LCD backlight.
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*
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* The real implementation would divide PERCLK[0] first by
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* both the prescaler (/1 .. /128) and then by CLKSEL
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* (/2 .. /16).
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*/
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u32 max = readl(imx->mmio_base + MX1_PWMP);
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u32 p = max * duty_ns / period_ns;
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writel(max - p, imx->mmio_base + MX1_PWMS);
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return 0;
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}
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static void imx_pwm_set_enable_v1(struct pwm_chip *chip, bool enable)
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{
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struct imx_chip *imx = to_imx_chip(chip);
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u32 val;
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val = readl(imx->mmio_base + MX1_PWMC);
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if (enable)
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val |= MX1_PWMC_EN;
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else
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val &= ~MX1_PWMC_EN;
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writel(val, imx->mmio_base + MX1_PWMC);
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}
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static int imx_pwm_config_v2(struct pwm_chip *chip,
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struct pwm_device *pwm, int duty_ns, int period_ns)
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{
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struct imx_chip *imx = to_imx_chip(chip);
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struct device *dev = chip->dev;
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unsigned long long c;
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unsigned long period_cycles, duty_cycles, prescale;
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unsigned int period_ms;
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bool enable = test_bit(PWMF_ENABLED, &pwm->flags);
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int wait_count = 0, fifoav;
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u32 cr, sr;
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/*
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* i.MX PWMv2 has a 4-word sample FIFO.
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* In order to avoid FIFO overflow issue, we do software reset
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* to clear all sample FIFO if the controller is disabled or
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* wait for a full PWM cycle to get a relinquished FIFO slot
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* when the controller is enabled and the FIFO is fully loaded.
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*/
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if (enable) {
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sr = readl(imx->mmio_base + MX3_PWMSR);
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fifoav = sr & MX3_PWMSR_FIFOAV_MASK;
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if (fifoav == MX3_PWMSR_FIFOAV_4WORDS) {
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period_ms = DIV_ROUND_UP(pwm->period, NSEC_PER_MSEC);
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msleep(period_ms);
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sr = readl(imx->mmio_base + MX3_PWMSR);
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if (fifoav == (sr & MX3_PWMSR_FIFOAV_MASK))
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dev_warn(dev, "there is no free FIFO slot\n");
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}
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} else {
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writel(MX3_PWMCR_SWR, imx->mmio_base + MX3_PWMCR);
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do {
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usleep_range(200, 1000);
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cr = readl(imx->mmio_base + MX3_PWMCR);
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} while ((cr & MX3_PWMCR_SWR) &&
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(wait_count++ < MX3_PWM_SWR_LOOP));
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if (cr & MX3_PWMCR_SWR)
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dev_warn(dev, "software reset timeout\n");
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}
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c = clk_get_rate(imx->clk_per);
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c = c * period_ns;
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do_div(c, 1000000000);
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period_cycles = c;
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prescale = period_cycles / 0x10000 + 1;
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period_cycles /= prescale;
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c = (unsigned long long)period_cycles * duty_ns;
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do_div(c, period_ns);
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duty_cycles = c;
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/*
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* according to imx pwm RM, the real period value should be
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* PERIOD value in PWMPR plus 2.
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*/
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if (period_cycles > 2)
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period_cycles -= 2;
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else
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period_cycles = 0;
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writel(duty_cycles, imx->mmio_base + MX3_PWMSAR);
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writel(period_cycles, imx->mmio_base + MX3_PWMPR);
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cr = MX3_PWMCR_PRESCALER(prescale) |
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MX3_PWMCR_DOZEEN | MX3_PWMCR_WAITEN |
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MX3_PWMCR_DBGEN | MX3_PWMCR_CLKSRC_IPG_HIGH;
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if (enable)
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cr |= MX3_PWMCR_EN;
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writel(cr, imx->mmio_base + MX3_PWMCR);
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return 0;
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}
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static void imx_pwm_set_enable_v2(struct pwm_chip *chip, bool enable)
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{
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struct imx_chip *imx = to_imx_chip(chip);
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u32 val;
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val = readl(imx->mmio_base + MX3_PWMCR);
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if (enable)
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val |= MX3_PWMCR_EN;
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else
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val &= ~MX3_PWMCR_EN;
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writel(val, imx->mmio_base + MX3_PWMCR);
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}
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static int imx_pwm_config(struct pwm_chip *chip,
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struct pwm_device *pwm, int duty_ns, int period_ns)
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{
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struct imx_chip *imx = to_imx_chip(chip);
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int ret;
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ret = clk_prepare_enable(imx->clk_ipg);
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if (ret)
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return ret;
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ret = imx->config(chip, pwm, duty_ns, period_ns);
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clk_disable_unprepare(imx->clk_ipg);
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return ret;
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}
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static int imx_pwm_enable(struct pwm_chip *chip, struct pwm_device *pwm)
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{
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struct imx_chip *imx = to_imx_chip(chip);
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int ret;
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ret = clk_prepare_enable(imx->clk_per);
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if (ret)
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return ret;
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imx->set_enable(chip, true);
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return 0;
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}
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static void imx_pwm_disable(struct pwm_chip *chip, struct pwm_device *pwm)
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{
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struct imx_chip *imx = to_imx_chip(chip);
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imx->set_enable(chip, false);
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clk_disable_unprepare(imx->clk_per);
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}
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static struct pwm_ops imx_pwm_ops = {
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.enable = imx_pwm_enable,
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.disable = imx_pwm_disable,
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.config = imx_pwm_config,
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.owner = THIS_MODULE,
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};
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struct imx_pwm_data {
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int (*config)(struct pwm_chip *chip,
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struct pwm_device *pwm, int duty_ns, int period_ns);
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void (*set_enable)(struct pwm_chip *chip, bool enable);
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};
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static struct imx_pwm_data imx_pwm_data_v1 = {
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.config = imx_pwm_config_v1,
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.set_enable = imx_pwm_set_enable_v1,
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};
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static struct imx_pwm_data imx_pwm_data_v2 = {
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.config = imx_pwm_config_v2,
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.set_enable = imx_pwm_set_enable_v2,
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};
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static const struct of_device_id imx_pwm_dt_ids[] = {
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{ .compatible = "fsl,imx1-pwm", .data = &imx_pwm_data_v1, },
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{ .compatible = "fsl,imx27-pwm", .data = &imx_pwm_data_v2, },
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{ /* sentinel */ }
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};
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MODULE_DEVICE_TABLE(of, imx_pwm_dt_ids);
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static int imx_pwm_probe(struct platform_device *pdev)
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{
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const struct of_device_id *of_id =
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of_match_device(imx_pwm_dt_ids, &pdev->dev);
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const struct imx_pwm_data *data;
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struct imx_chip *imx;
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struct resource *r;
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int ret = 0;
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if (!of_id)
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return -ENODEV;
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imx = devm_kzalloc(&pdev->dev, sizeof(*imx), GFP_KERNEL);
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if (imx == NULL)
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return -ENOMEM;
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imx->clk_per = devm_clk_get(&pdev->dev, "per");
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if (IS_ERR(imx->clk_per)) {
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dev_err(&pdev->dev, "getting per clock failed with %ld\n",
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PTR_ERR(imx->clk_per));
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return PTR_ERR(imx->clk_per);
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}
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imx->clk_ipg = devm_clk_get(&pdev->dev, "ipg");
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if (IS_ERR(imx->clk_ipg)) {
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dev_err(&pdev->dev, "getting ipg clock failed with %ld\n",
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PTR_ERR(imx->clk_ipg));
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return PTR_ERR(imx->clk_ipg);
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}
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imx->chip.ops = &imx_pwm_ops;
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imx->chip.dev = &pdev->dev;
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imx->chip.base = -1;
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imx->chip.npwm = 1;
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imx->chip.can_sleep = true;
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r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
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imx->mmio_base = devm_ioremap_resource(&pdev->dev, r);
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if (IS_ERR(imx->mmio_base))
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return PTR_ERR(imx->mmio_base);
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data = of_id->data;
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imx->config = data->config;
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imx->set_enable = data->set_enable;
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ret = pwmchip_add(&imx->chip);
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if (ret < 0)
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return ret;
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platform_set_drvdata(pdev, imx);
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return 0;
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}
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static int imx_pwm_remove(struct platform_device *pdev)
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{
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struct imx_chip *imx;
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imx = platform_get_drvdata(pdev);
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if (imx == NULL)
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return -ENODEV;
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return pwmchip_remove(&imx->chip);
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}
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static struct platform_driver imx_pwm_driver = {
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.driver = {
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.name = "imx-pwm",
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.owner = THIS_MODULE,
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.of_match_table = imx_pwm_dt_ids,
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},
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.probe = imx_pwm_probe,
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.remove = imx_pwm_remove,
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};
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module_platform_driver(imx_pwm_driver);
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MODULE_LICENSE("GPL v2");
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MODULE_AUTHOR("Sascha Hauer <s.hauer@pengutronix.de>");
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