kernel_optimize_test/arch/ppc64
David Gibson 14b3466161 [PATCH] Invert sense of SLB class bit
Currently, we set the class bit in kernel SLB entries, and clear it on
user SLB entries.  On POWER5, ERAT entries created in real mode have
the class bit clear.  So to avoid flushing kernel ERAT entries on each
context switch, this patch inverts our usage of the class bit, setting
it on user SLB entries and clearing it on kernel SLB entries.

Booted on POWER5 and G5.

Signed-off-by: David Gibson <dwg@au1.ibm.com>
Signed-off-by: Paul Mackerras <paulus@samba.org>
2005-09-06 16:57:46 +10:00
..
boot [PATCH] ppc64: make arch/ppc64/boot standalone 2005-08-29 10:53:31 +10:00
configs [PATCH] ppc64: Add CONFIG_HZ 2005-08-30 13:40:02 +10:00
kernel [PATCH] Invert sense of SLB class bit 2005-09-06 16:57:46 +10:00
lib [PATCH] ppc64 iSeries: allow build with no PCI 2005-06-21 18:46:31 -07:00
mm [PATCH] Invert sense of SLB class bit 2005-09-06 16:57:46 +10:00
oprofile [PATCH] ppc64: Move oprofile_model into cpu feature struct 2005-09-06 16:09:21 +10:00
xmon [PATCH] ppc64: Take udbg out of ppc_md 2005-09-06 16:07:36 +10:00
defconfig [PATCH] ppc64: Add CONFIG_HZ 2005-08-30 13:40:02 +10:00
Kconfig [PATCH] ppc64: Remove CONFIG_MSCHUNKS 2005-08-29 10:53:37 +10:00
Kconfig.debug [PATCH] ppc64: update xmon helptext 2005-09-05 00:06:01 -07:00
Makefile [PATCH] Create include/asm-powerpc 2005-08-30 13:32:04 +10:00