forked from luck/tmp_suning_uos_patched
0a0300dc8c
Most machine classes want some way to register a block of clk_lookup structures, and most do it by implementing a clks_register() type function which walks an array, or by open-coding a loop. Consolidate all this into clkdev_add_table(). Acked-by: H Hartley Sweeten <hsweeten@visionengravers.com> Reviewed-by: Kevin Hilman <khilman@deeprootsystems.com> Acked-by: Eric Miao <eric.y.miao@gmail.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
100 lines
2.5 KiB
C
100 lines
2.5 KiB
C
/*
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* linux/arch/arm/mach-pxa/pxa320.c
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*
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* Code specific to PXA320
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*
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* Copyright (C) 2007 Marvell Internation Ltd.
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*
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* 2007-08-21: eric miao <eric.miao@marvell.com>
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* initial version
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#include <linux/module.h>
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#include <linux/kernel.h>
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#include <linux/platform_device.h>
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#include <mach/pxa320.h>
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#include "generic.h"
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#include "devices.h"
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#include "clock.h"
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static struct mfp_addr_map pxa320_mfp_addr_map[] __initdata = {
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MFP_ADDR_X(GPIO0, GPIO4, 0x0124),
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MFP_ADDR_X(GPIO5, GPIO9, 0x028C),
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MFP_ADDR(GPIO10, 0x0458),
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MFP_ADDR_X(GPIO11, GPIO26, 0x02A0),
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MFP_ADDR_X(GPIO27, GPIO48, 0x0400),
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MFP_ADDR_X(GPIO49, GPIO62, 0x045C),
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MFP_ADDR_X(GPIO63, GPIO73, 0x04B4),
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MFP_ADDR_X(GPIO74, GPIO98, 0x04F0),
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MFP_ADDR_X(GPIO99, GPIO127, 0x0600),
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MFP_ADDR_X(GPIO0_2, GPIO5_2, 0x0674),
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MFP_ADDR_X(GPIO6_2, GPIO13_2, 0x0494),
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MFP_ADDR_X(GPIO14_2, GPIO17_2, 0x04E0),
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MFP_ADDR(nXCVREN, 0x0138),
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MFP_ADDR(DF_CLE_nOE, 0x0204),
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MFP_ADDR(DF_nADV1_ALE, 0x0208),
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MFP_ADDR(DF_SCLK_S, 0x020C),
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MFP_ADDR(DF_SCLK_E, 0x0210),
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MFP_ADDR(nBE0, 0x0214),
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MFP_ADDR(nBE1, 0x0218),
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MFP_ADDR(DF_nADV2_ALE, 0x021C),
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MFP_ADDR(DF_INT_RnB, 0x0220),
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MFP_ADDR(DF_nCS0, 0x0224),
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MFP_ADDR(DF_nCS1, 0x0228),
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MFP_ADDR(DF_nWE, 0x022C),
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MFP_ADDR(DF_nRE_nOE, 0x0230),
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MFP_ADDR(nLUA, 0x0234),
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MFP_ADDR(nLLA, 0x0238),
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MFP_ADDR(DF_ADDR0, 0x023C),
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MFP_ADDR(DF_ADDR1, 0x0240),
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MFP_ADDR(DF_ADDR2, 0x0244),
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MFP_ADDR(DF_ADDR3, 0x0248),
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MFP_ADDR(DF_IO0, 0x024C),
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MFP_ADDR(DF_IO8, 0x0250),
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MFP_ADDR(DF_IO1, 0x0254),
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MFP_ADDR(DF_IO9, 0x0258),
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MFP_ADDR(DF_IO2, 0x025C),
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MFP_ADDR(DF_IO10, 0x0260),
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MFP_ADDR(DF_IO3, 0x0264),
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MFP_ADDR(DF_IO11, 0x0268),
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MFP_ADDR(DF_IO4, 0x026C),
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MFP_ADDR(DF_IO12, 0x0270),
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MFP_ADDR(DF_IO5, 0x0274),
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MFP_ADDR(DF_IO13, 0x0278),
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MFP_ADDR(DF_IO6, 0x027C),
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MFP_ADDR(DF_IO14, 0x0280),
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MFP_ADDR(DF_IO7, 0x0284),
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MFP_ADDR(DF_IO15, 0x0288),
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MFP_ADDR_END,
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};
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static DEFINE_PXA3_CKEN(pxa320_nand, NAND, 104000000, 0);
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static DEFINE_PXA3_CKEN(gcu, PXA320_GCU, 0, 0);
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static struct clk_lookup pxa320_clkregs[] = {
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INIT_CLKREG(&clk_pxa320_nand, "pxa3xx-nand", NULL),
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INIT_CLKREG(&clk_gcu, "pxa3xx-gcu", NULL),
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};
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static int __init pxa320_init(void)
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{
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if (cpu_is_pxa320()) {
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mfp_init_base(io_p2v(MFPR_BASE));
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mfp_init_addr(pxa320_mfp_addr_map);
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clkdev_add_table(ARRAY_AND_SIZE(pxa320_clkregs));
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}
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return 0;
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}
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core_initcall(pxa320_init);
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