forked from luck/tmp_suning_uos_patched
1888e7b51c
On iSeries, the paca contains, amongst other things an ItLpRegSave structure used by the hypervisor to save registers. The hypervisor locates this area through a pointer at the beginning of the paca, so the structure itself can be located elsewhere. This patch moves the reg_save area out into its own array. This reduces the amount of iSeries specific gunk which is visible to general powerpc code via paca.h Built and booted on POWER5 LPAR and iSeries RS64. Signed-off-by: David Gibson <dwg@au1.ibm.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
119 lines
3.8 KiB
C
119 lines
3.8 KiB
C
/*
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* include/asm-powerpc/paca.h
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*
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* This control block defines the PACA which defines the processor
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* specific data for each logical processor on the system.
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* There are some pointers defined that are utilized by PLIC.
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*
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* C 2001 PPC 64 Team, IBM Corp
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version
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* 2 of the License, or (at your option) any later version.
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*/
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#ifndef _ASM_POWERPC_PACA_H
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#define _ASM_POWERPC_PACA_H
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#include <linux/config.h>
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#include <asm/types.h>
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#include <asm/lppaca.h>
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#include <asm/mmu.h>
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register struct paca_struct *local_paca asm("r13");
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#define get_paca() local_paca
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struct task_struct;
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/*
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* Defines the layout of the paca.
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*
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* This structure is not directly accessed by firmware or the service
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* processor except for the first two pointers that point to the
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* lppaca area and the ItLpRegSave area for this CPU. The lppaca
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* object is currently contained within the PACA but it doesn't need
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* to be.
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*/
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struct paca_struct {
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/*
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* Because hw_cpu_id, unlike other paca fields, is accessed
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* routinely from other CPUs (from the IRQ code), we stick to
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* read-only (after boot) fields in the first cacheline to
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* avoid cacheline bouncing.
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*/
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/*
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* MAGIC: These first two pointers can't be moved - they're
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* accessed by the firmware
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*/
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struct lppaca *lppaca_ptr; /* Pointer to LpPaca for PLIC */
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#ifdef CONFIG_PPC_ISERIES
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void *reg_save_ptr; /* Pointer to LpRegSave for PLIC */
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#endif /* CONFIG_PPC_ISERIES */
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/*
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* MAGIC: the spinlock functions in arch/ppc64/lib/locks.c
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* load lock_token and paca_index with a single lwz
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* instruction. They must travel together and be properly
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* aligned.
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*/
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u16 lock_token; /* Constant 0x8000, used in locks */
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u16 paca_index; /* Logical processor number */
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u32 default_decr; /* Default decrementer value */
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u64 kernel_toc; /* Kernel TOC address */
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u64 stab_real; /* Absolute address of segment table */
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u64 stab_addr; /* Virtual address of segment table */
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void *emergency_sp; /* pointer to emergency stack */
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s16 hw_cpu_id; /* Physical processor number */
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u8 cpu_start; /* At startup, processor spins until */
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/* this becomes non-zero. */
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/*
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* Now, starting in cacheline 2, the exception save areas
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*/
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/* used for most interrupts/exceptions */
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u64 exgen[10] __attribute__((aligned(0x80)));
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u64 exmc[10]; /* used for machine checks */
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u64 exslb[10]; /* used for SLB/segment table misses
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* on the linear mapping */
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#ifdef CONFIG_PPC_64K_PAGES
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pgd_t *pgdir;
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#endif /* CONFIG_PPC_64K_PAGES */
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mm_context_t context;
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u16 slb_cache[SLB_CACHE_ENTRIES];
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u16 slb_cache_ptr;
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/*
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* then miscellaneous read-write fields
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*/
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struct task_struct *__current; /* Pointer to current */
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u64 kstack; /* Saved Kernel stack addr */
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u64 stab_rr; /* stab/slb round-robin counter */
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u64 next_jiffy_update_tb; /* TB value for next jiffy update */
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u64 saved_r1; /* r1 save for RTAS calls */
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u64 saved_msr; /* MSR saved here by enter_rtas */
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u8 proc_enabled; /* irq soft-enable flag */
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/* not yet used */
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u64 exdsi[8]; /* used for linear mapping hash table misses */
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/*
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* iSeries structure which the hypervisor knows about -
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* this structure should not cross a page boundary.
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* The vpa_init/register_vpa call is now known to fail if the
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* lppaca structure crosses a page boundary.
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* The lppaca is also used on POWER5 pSeries boxes.
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* The lppaca is 640 bytes long, and cannot readily change
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* since the hypervisor knows its layout, so a 1kB
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* alignment will suffice to ensure that it doesn't
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* cross a page boundary.
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*/
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struct lppaca lppaca __attribute__((__aligned__(0x400)));
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};
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extern struct paca_struct paca[];
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#endif /* _ASM_POWERPC_PACA_H */
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