forked from luck/tmp_suning_uos_patched
49dd2c4928
When we use TID=N userspace mappings, we must ensure that kernel mappings have been destroyed when entering userspace. Using TID=1/TID=0 for kernel/user mappings and running userspace with PID=0 means that userspace can't access the kernel mappings, but the kernel can directly access userspace. The net is that we don't need to flush the TLB on privilege switches, but we do on guest context switches (which are far more infrequent). Guest boot time performance improvement: about 30%. Signed-off-by: Hollis Blanchard <hollisb@us.ibm.com> Signed-off-by: Avi Kivity <avi@qumranet.com>
108 lines
3.7 KiB
C
108 lines
3.7 KiB
C
/*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License, version 2, as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
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*
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* Copyright IBM Corp. 2008
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*
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* Authors: Hollis Blanchard <hollisb@us.ibm.com>
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*/
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#ifndef __POWERPC_KVM_PPC_H__
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#define __POWERPC_KVM_PPC_H__
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/* This file exists just so we can dereference kvm_vcpu, avoiding nested header
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* dependencies. */
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#include <linux/mutex.h>
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#include <linux/timer.h>
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#include <linux/types.h>
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#include <linux/kvm_types.h>
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#include <linux/kvm_host.h>
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struct kvm_tlb {
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struct tlbe guest_tlb[PPC44x_TLB_SIZE];
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struct tlbe shadow_tlb[PPC44x_TLB_SIZE];
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};
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enum emulation_result {
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EMULATE_DONE, /* no further processing */
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EMULATE_DO_MMIO, /* kvm_run filled with MMIO request */
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EMULATE_DO_DCR, /* kvm_run filled with DCR request */
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EMULATE_FAIL, /* can't emulate this instruction */
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};
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extern const unsigned char exception_priority[];
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extern const unsigned char priority_exception[];
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extern int __kvmppc_vcpu_run(struct kvm_run *kvm_run, struct kvm_vcpu *vcpu);
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extern char kvmppc_handlers_start[];
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extern unsigned long kvmppc_handler_len;
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extern void kvmppc_dump_vcpu(struct kvm_vcpu *vcpu);
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extern int kvmppc_handle_load(struct kvm_run *run, struct kvm_vcpu *vcpu,
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unsigned int rt, unsigned int bytes,
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int is_bigendian);
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extern int kvmppc_handle_store(struct kvm_run *run, struct kvm_vcpu *vcpu,
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u32 val, unsigned int bytes, int is_bigendian);
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extern int kvmppc_emulate_instruction(struct kvm_run *run,
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struct kvm_vcpu *vcpu);
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extern int kvmppc_emulate_mmio(struct kvm_run *run, struct kvm_vcpu *vcpu);
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extern void kvmppc_mmu_map(struct kvm_vcpu *vcpu, u64 gvaddr, gfn_t gfn,
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u64 asid, u32 flags);
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extern void kvmppc_mmu_invalidate(struct kvm_vcpu *vcpu, gva_t eaddr,
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gva_t eend, u32 asid);
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extern void kvmppc_mmu_priv_switch(struct kvm_vcpu *vcpu, int usermode);
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extern void kvmppc_mmu_switch_pid(struct kvm_vcpu *vcpu, u32 pid);
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/* XXX Book E specific */
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extern void kvmppc_tlbe_set_modified(struct kvm_vcpu *vcpu, unsigned int i);
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extern void kvmppc_check_and_deliver_interrupts(struct kvm_vcpu *vcpu);
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static inline void kvmppc_queue_exception(struct kvm_vcpu *vcpu, int exception)
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{
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unsigned int priority = exception_priority[exception];
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set_bit(priority, &vcpu->arch.pending_exceptions);
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}
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static inline void kvmppc_clear_exception(struct kvm_vcpu *vcpu, int exception)
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{
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unsigned int priority = exception_priority[exception];
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clear_bit(priority, &vcpu->arch.pending_exceptions);
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}
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/* Helper function for "full" MSR writes. No need to call this if only EE is
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* changing. */
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static inline void kvmppc_set_msr(struct kvm_vcpu *vcpu, u32 new_msr)
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{
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if ((new_msr & MSR_PR) != (vcpu->arch.msr & MSR_PR))
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kvmppc_mmu_priv_switch(vcpu, new_msr & MSR_PR);
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vcpu->arch.msr = new_msr;
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if (vcpu->arch.msr & MSR_WE)
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kvm_vcpu_block(vcpu);
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}
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static inline void kvmppc_set_pid(struct kvm_vcpu *vcpu, u32 new_pid)
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{
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if (vcpu->arch.pid != new_pid) {
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vcpu->arch.pid = new_pid;
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vcpu->arch.swap_pid = 1;
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}
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}
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#endif /* __POWERPC_KVM_PPC_H__ */
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