forked from luck/tmp_suning_uos_patched
445959821f
This patch changes 24xx to use new register access, except for clock framework. Clock framework register access will get updates in the next patch. Note that board-*.c files change GPMC (General Purpose Memory Controller) access to use gpmc_cs_write_reg() instead of accessing the registers directly. The code also uses gpmc_fck instead of it's parent clock core_l3_ck for GPMC clock. The H4 board file also adds h4_init_flash() function, which specify the flash start and end addresses. Also note that sleep.S removes some unused registers addresses. Signed-off-by: Paul Walmsley <paul@pwsan.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
271 lines
6.5 KiB
C
271 lines
6.5 KiB
C
/*
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* linux/arch/arm/plat-omap/common.c
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*
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* Code common to all OMAP machines.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#include <linux/module.h>
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#include <linux/kernel.h>
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#include <linux/init.h>
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#include <linux/delay.h>
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#include <linux/pm.h>
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#include <linux/console.h>
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#include <linux/serial.h>
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#include <linux/tty.h>
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#include <linux/serial_8250.h>
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#include <linux/serial_reg.h>
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#include <linux/clk.h>
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#include <asm/hardware.h>
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#include <asm/system.h>
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#include <asm/pgtable.h>
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#include <asm/mach/map.h>
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#include <asm/io.h>
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#include <asm/setup.h>
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#include <asm/arch/board.h>
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#include <asm/arch/control.h>
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#include <asm/arch/mux.h>
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#include <asm/arch/fpga.h>
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#include <asm/arch/clock.h>
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#if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3)
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# include "../mach-omap2/sdrc.h"
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#endif
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#define NO_LENGTH_CHECK 0xffffffff
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unsigned char omap_bootloader_tag[512];
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int omap_bootloader_tag_len;
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struct omap_board_config_kernel *omap_board_config;
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int omap_board_config_size;
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static const void *get_config(u16 tag, size_t len, int skip, size_t *len_out)
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{
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struct omap_board_config_kernel *kinfo = NULL;
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int i;
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#ifdef CONFIG_OMAP_BOOT_TAG
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struct omap_board_config_entry *info = NULL;
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if (omap_bootloader_tag_len > 4)
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info = (struct omap_board_config_entry *) omap_bootloader_tag;
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while (info != NULL) {
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u8 *next;
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if (info->tag == tag) {
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if (skip == 0)
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break;
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skip--;
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}
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if ((info->len & 0x03) != 0) {
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/* We bail out to avoid an alignment fault */
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printk(KERN_ERR "OMAP peripheral config: Length (%d) not word-aligned (tag %04x)\n",
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info->len, info->tag);
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return NULL;
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}
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next = (u8 *) info + sizeof(*info) + info->len;
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if (next >= omap_bootloader_tag + omap_bootloader_tag_len)
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info = NULL;
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else
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info = (struct omap_board_config_entry *) next;
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}
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if (info != NULL) {
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/* Check the length as a lame attempt to check for
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* binary inconsistency. */
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if (len != NO_LENGTH_CHECK) {
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/* Word-align len */
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if (len & 0x03)
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len = (len + 3) & ~0x03;
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if (info->len != len) {
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printk(KERN_ERR "OMAP peripheral config: Length mismatch with tag %x (want %d, got %d)\n",
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tag, len, info->len);
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return NULL;
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}
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}
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if (len_out != NULL)
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*len_out = info->len;
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return info->data;
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}
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#endif
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/* Try to find the config from the board-specific structures
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* in the kernel. */
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for (i = 0; i < omap_board_config_size; i++) {
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if (omap_board_config[i].tag == tag) {
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if (skip == 0) {
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kinfo = &omap_board_config[i];
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break;
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} else {
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skip--;
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}
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}
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}
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if (kinfo == NULL)
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return NULL;
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return kinfo->data;
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}
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const void *__omap_get_config(u16 tag, size_t len, int nr)
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{
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return get_config(tag, len, nr, NULL);
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}
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EXPORT_SYMBOL(__omap_get_config);
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const void *omap_get_var_config(u16 tag, size_t *len)
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{
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return get_config(tag, NO_LENGTH_CHECK, 0, len);
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}
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EXPORT_SYMBOL(omap_get_var_config);
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static int __init omap_add_serial_console(void)
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{
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const struct omap_serial_console_config *con_info;
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const struct omap_uart_config *uart_info;
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static char speed[11], *opt = NULL;
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int line, i, uart_idx;
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uart_info = omap_get_config(OMAP_TAG_UART, struct omap_uart_config);
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con_info = omap_get_config(OMAP_TAG_SERIAL_CONSOLE,
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struct omap_serial_console_config);
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if (uart_info == NULL || con_info == NULL)
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return 0;
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if (con_info->console_uart == 0)
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return 0;
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if (con_info->console_speed) {
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snprintf(speed, sizeof(speed), "%u", con_info->console_speed);
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opt = speed;
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}
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uart_idx = con_info->console_uart - 1;
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if (uart_idx >= OMAP_MAX_NR_PORTS) {
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printk(KERN_INFO "Console: external UART#%d. "
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"Not adding it as console this time.\n",
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uart_idx + 1);
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return 0;
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}
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if (!(uart_info->enabled_uarts & (1 << uart_idx))) {
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printk(KERN_ERR "Console: Selected UART#%d is "
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"not enabled for this platform\n",
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uart_idx + 1);
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return -1;
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}
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line = 0;
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for (i = 0; i < uart_idx; i++) {
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if (uart_info->enabled_uarts & (1 << i))
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line++;
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}
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return add_preferred_console("ttyS", line, opt);
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}
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console_initcall(omap_add_serial_console);
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/*
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* 32KHz clocksource ... always available, on pretty most chips except
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* OMAP 730 and 1510. Other timers could be used as clocksources, with
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* higher resolution in free-running counter modes (e.g. 12 MHz xtal),
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* but systems won't necessarily want to spend resources that way.
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*/
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#if defined(CONFIG_ARCH_OMAP16XX)
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#define TIMER_32K_SYNCHRONIZED 0xfffbc410
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#elif defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX)
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#define TIMER_32K_SYNCHRONIZED (OMAP2_32KSYNCT_BASE + 0x10)
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#endif
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#ifdef TIMER_32K_SYNCHRONIZED
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#include <linux/clocksource.h>
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static cycle_t omap_32k_read(void)
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{
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return omap_readl(TIMER_32K_SYNCHRONIZED);
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}
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static struct clocksource clocksource_32k = {
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.name = "32k_counter",
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.rating = 250,
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.read = omap_32k_read,
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.mask = CLOCKSOURCE_MASK(32),
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.shift = 10,
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.flags = CLOCK_SOURCE_IS_CONTINUOUS,
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};
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/*
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* Rounds down to nearest nsec.
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*/
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unsigned long long omap_32k_ticks_to_nsecs(unsigned long ticks_32k)
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{
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return cyc2ns(&clocksource_32k, ticks_32k);
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}
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/*
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* Returns current time from boot in nsecs. It's OK for this to wrap
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* around for now, as it's just a relative time stamp.
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*/
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unsigned long long sched_clock(void)
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{
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return omap_32k_ticks_to_nsecs(omap_32k_read());
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}
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static int __init omap_init_clocksource_32k(void)
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{
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static char err[] __initdata = KERN_ERR
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"%s: can't register clocksource!\n";
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if (cpu_is_omap16xx() || cpu_class_is_omap2()) {
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struct clk *sync_32k_ick;
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sync_32k_ick = clk_get(NULL, "omap_32ksync_ick");
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if (sync_32k_ick)
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clk_enable(sync_32k_ick);
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clocksource_32k.mult = clocksource_hz2mult(32768,
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clocksource_32k.shift);
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if (clocksource_register(&clocksource_32k))
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printk(err, clocksource_32k.name);
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}
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return 0;
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}
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arch_initcall(omap_init_clocksource_32k);
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#endif /* TIMER_32K_SYNCHRONIZED */
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/* Global address base setup code */
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#if defined(CONFIG_ARCH_OMAP2420)
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void __init omap2_set_globals_242x(void)
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{
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omap2_sdrc_base = OMAP2420_SDRC_BASE;
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omap2_sms_base = OMAP2420_SMS_BASE;
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omap_ctrl_base_set(OMAP2420_CTRL_BASE);
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}
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#endif
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#if defined(CONFIG_ARCH_OMAP2430)
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void __init omap2_set_globals_243x(void)
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{
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omap2_sdrc_base = OMAP243X_SDRC_BASE;
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omap2_sms_base = OMAP243X_SMS_BASE;
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omap_ctrl_base_set(OMAP243X_CTRL_BASE);
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}
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#endif
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#if defined(CONFIG_ARCH_OMAP3430)
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void __init omap2_set_globals_343x(void)
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{
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omap2_sdrc_base = OMAP343X_SDRC_BASE;
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omap2_sms_base = OMAP343X_SMS_BASE;
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omap_ctrl_base_set(OMAP343X_CTRL_BASE);
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}
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#endif
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